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Commodore Amiga A500 - Page 37

Commodore Amiga A500
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It
is fairly difficult to avoid tri-state fights on the data buffers. In or-
der to get data out to dynamic RAM
PlCs at an early enough time, we
do not use the data strobes to enable the data drivers, because these
strobes can go active very late in a write cycle.
On a read cycle we use the data strobes, so that in case the cycle
turns out to be a Read-Modify-Write cycle, the drivers will be turned
off (to avoid tri-state fight) while the
RNV
line
is
changing state.
Refer to the PAL equation for DBOE in the STEERING PAL appendix.
The term (AS
*
RD*) turns on the drivers for all write cycles, includ-
ing the write portion of Read-Modify-Write cycles. Note that since
AS turns off the data drivers, the data hold time
is
not guaranteed
beyond AS going inactive, so
it
is poor design practice to try to use
the rising edge of AS*, UDS*, or LDS* to latch data.
The terms (UDS
*
RD
*
ASQ) and (LDS
*
RD
*
ASQ) turn on the driv-
ers for all read cycles. The UDS and LDS turn off the drivers in the
middle of a Read-Modify-Write cycle.
The ASQ (ASDELAYED equivalent) keeps the data buffers from turn-
ing on until after there has been enough time for the collision detect
circuit to assert BERR* low and thus disable
the.data drivers before
they fight (see collision detection).
Generaing
D-TCPROC*
The inverse of the D-TO-PROC* signal is called D2P in the PAL equa-
tion.
Collision Detection
Each backplane or device that passes the bus or allows more than
one slave device must have a collision detect circuit. This circuit will
usually be implemented in a PAL. This circuit must detect any in-
stance of two slaves responding to the same bus cycle and assert
BERR* immediately upon detecting such an error.
The collision circuit has an input (see schematic)
SLAVEIN* which
is
passed from the upstream backplane or device (if any is present).
If no upstream device
is
present, the pull-up resistor will hold
SLAVEIN* inactive (high). SLAVEIN* tells the circuit whether or not
an upstream PIC
is
responding to the current bws' cycle as a slave.
The circuit also has one input for each slot on this backplane. If any
PIC on
this
backplane is responding as a slave, the corresponding
SLAVEn* will be active.

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