Commodore Amiga A500 - Page 54

SO S1 S2 S3 S4 S5 S6 S7 SO etc
7M = CLK
A23-A1
AS*
UDS*,LDS*
D15-W
R'W
DTACK*
XXXXXXX ,xxxx
XXXXXX XXXX
Fig. 3.3 Standard 4 Clock Read Cycle
SO S1 S2 S3 S4 S5 S6 S7 SO etc
7M = CLK
A23-A1
AS*
XXXXXXX XXXX
XXXXX XXX
- - - - - -
R'W W
Fig. 3.4 Standard 4 Clock Write Cycle