Processor Status
(FCO-FCZ)
Bus Error
(BERR)
These signals are the
68000
Processor Status outputs, which can be
used by bus devices to determine the internal state of the
68000
any
time
/AS is asserted. When a coprocessor is in charge,
it
must drive
these pins in a way compatible with how the
68000
does it. The dif-
ferent
68000
status codes can be found in any
68000
spec sheet.
Pins
31.
33,
35.
This is an input that goes directly to the 68000.
Its
used to indicate
the occurrence of some kind of bus error. Any Expansion Card capa-
ble of detecting a bus error relating directly to that card can assert
IBERR when that bus error condition is detected. At other times, the
card must monitor IBERR and be prepared to tri-state all of
its
on-
bus output buffers whenever this signal
is
asserted. The Coprocessor
card won't have to tri-state on IBERR, but
it
must note
it
and pro-
vide some way of handling the occurrence (the
68000
under normal
Amiga OS control merely signals a Guru Error based on the Bus Er-
ror Exception). Since any number of devices may assert IBERR, and
nearly everything in the system must monitor
it,
any device that
drives
IBERR must drive with an open collector or similar device ca-
pable of sinking at least
12ma, and any device that monitors IBERR
should place as little load on
it
as possible
(1
"F"
type load or less,
per board, is suggested). This signal is connected to a low valued
on-
board pullup resistor, and shouldn't need any more pulling up. Pin
46.
System
Reset
(IRST)
Pin
53
of the bus contains the IRST signal which is in common with
the original 68000 reset signal. The IRST signal
is
bidirectional, and
the
68000
tri-states
it
when the coprocessor takes over.
It
is
only
necessary for the processor to output this signal if
it
needs to reset
the system under program control. The IRST signal is connected to a
medium valued on-board
pullup resistor and shouldn't need any
more pulling up. The coprocessor must monitor
this
signal and re-
spond to
it
appropriately;
this
may mean a complete reset, but
it
doesn't have to. The Coprocessor can also assert this line if a system
reset is desired.
System Halt
(IHLT)
This
is
the 68000's processor halt signal. tied directly to the
68000.
It
is connected to a medium valued on-board pullup resistor and
shouldn't need any more pulling up. This signal, when asserted, will
halt and tri-state the
68000
at the end of the current bus cycle. If
driven by the
68000,
it
indicates detection of a double bus fault. For
a complete system reset, the
68000
looks for both the IRST and
IHLT lines to be asserted. The Coprocessor should handle this signal
in a similar fashion. Pin
55.
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