DLR-TL001 Memory Description
Quick Reference Guide 13
The STATUS Register’s 16 bits are the following:
0 - BAT_LSBIT (RO):
1 - BAT_MSBIT (RO): Bits 0 &1 codify the Battery Level
Status
2 - MEMFULL (RO): flag a full memory condition.
DLR-TL-001 is put in Sleep Mode automatically
3 - ETA_ALRM (RO): set if ETA delay is exceeded.
4 - BIN_ALRM (RO): histograms Alarm. Set if at least one
threshold is exceeded.
5 - MKT_ALRM (RO): set if the Mean Kinetics Temperature
is greater than the Mean Kinetic Threshold Temperature.
6 - SHL_ALRM (RO): remaining shelf life is smaller than
threshold.
6 to 15 Bits – RFU: (Reserved for Future Use).
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