Dell PowerEdge R820 - System Security Screen

25 PowerEdge R820 Technical Guide
Table 13. Select Network Adapter selection for racks
10Gb
Ethernet
10Gb
Converged
1Gb
Ethernet
1Gb
Converged
Running
Protocols
LAN
LAN+
ISCSI
LAN+
FCoE
LAN+ISCSI+
FCoE
LAN
LAN+ISCSI
Racks
Broadcom
57800
2x1Gb+2x10
Gb SFP+
Broadcom
57800
2x1Gb+2x10
Gb SFP+
-
-
Broadcom
5720 4x1Gb
BT
Broadcom
5720 4x1Gb
BT
Intel i540
2x1Gb+32x1
0Gb BT
Intel i540
2x1Gb+32x1
0Gb BT
-
-
Intel i350
4x1Gb BT
Intel i350
4x1Gb BT
System management integration
With R820, the job of deploying, updating, monitoring and maintaining the Select Network Adapters
is fast and easy. System management integration features include the following:
 Pre-boot: Use the Dell Lifecycle Controller graphical user interface (GUI) to set configuration
such as bandwidth allocation or firmware revision level
 Post-boot: Agent-free out-of-band or high-speed in-band connection over LOM through the
Operating System/BMC pass-through feature for sensory information
 Automation of firmware and driver version deployment upon component replacement
 Automatic monitoring of NIC status and notification on SNMP traps
 Local or remote re-configuration of any NIC, physical or virtual
 PXE boot enabled on all LOM and NDCs for ease of use
 Boot from SAN (iSCSI, FCoE) configuration for networking devices through the Lifecycle
Controller GUI
PCIe expansion
The R820 provides expanded PCIe slot capability over the previous servers. This is made possible by
the 40 PCIe lanes available from each processor in the system. Dell designed the R820 to be PCIe
3.0-compliant in order to take full advantage of the processor capabilities.
PCIe slots
PCIe connectivity is integrated with the processor in that the number of processors in a system
impacts the number of PCIe slots and the bandwidth of each PCIe slot.
 Slot 1: half-length, full-height, CPU2, PCIe 3.0 x16 (x16 connector), right riser 1
 Slot 2: half-length, full-height, CPU2, PCIe 3.0 x8 (x16 connector), right riser 1
 Slot 3: half-length, low-profile, CPU1, PCIe 3.0 x8 (x16 connector), center riser 2
 Slot 4: half-length, low-profile, CPU2, PCIe 3.0 x8 (x16 connector), center riser 2
 Slot 5: half-length, low-profile, CPU2, PCIe 3.0 x8 (x16 connector), center riser 2
 Slot 6: half-length, full-height, CPU1, PCIe 3.0 x16 (x16 connector), left riser 3
 Slot 7: half-length, full-height, CPU1, PCIe 3.0 x8 (x8 connector), left riser 3