Denon DCD-1420 - CXA1182 AS Terminal Functions; CXA1182 AS Terminal Function Descriptions

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CXA1182AS Terminal Function
veo Terminal Terminal Function
Defect signal input terminal. Defect measure circuit activates at ''H”’.
Tracking error signal input terminal.
Tracking zero cross comparator input terminal.
Input terminal of ATSC detecting window comparator.
Focus error signal input terminal.
In case of reducing higher range gain of focus servo, connect a capacitor between this terminal and terminal number (9),
Shifts higher range gain of focus servo by FS3 ON/OFF.
Terminal for external time constant to increase lower range of focus servo.
Focus drive output.
Reverse input terminal for focus amplifier.
Terminal for external time constant to make focus search waveform.
Terminal for external time constant to shift higher range gain of tracking.
Tracking drive output.
Reverse input terminal for tracking amplifier.
SL(+) Non-reverse input terminal of sled amplifier.
Sled drive output.
Reverse input terminal of sled amplifier.
Terminal for limit switch ON/OFF to detect disc inner most circle.
Terminal to compensate peak in focus tracking phase, and for setting Fo in CLV LPF.
fre Terminal for external time constant to shift higher range gain of tracking.
Terminal to output FZC, AS, TZC, SSTOP, BUSY by command from CPU,
Terminal to output signal for track number count,
Terminal is used at the time of 1 track jump. A47 kQ pull up resistor is included.
Reset input terminal, Resets at ’L’’.
Serial data input from CPU.
Latch input from CPU.
Serial data transfer clock input from CPU.
Terminat for external time constant of loop filter.
Input terminal of PDO for CXD1125 phase comparator.
Delivers a current to set the height of focus search, track jump, and sted kick.
Output terminal of 8.64 MHz VCO.
Reckless drive protection circuit activates at ’L”. A 47 kQ pull up resistor is included.
Terminal to connect MDP terminal of CXD1125.
Terminal to connect MON terminal of CXD1125.
Terminal for external LPF time constant of CLV servo error signal.
SPDL(-)| Reverse input terminal for spindle drive amplifier.
SPDLO | Spindle drive output.
WDCK Clock input for auto-sequence. Normally applied 88.2 kHz.
FOK FOK signal input terminal.
MIRR MIRR signal input terminal.
= Resistance value between this terminal and terminal (37) is nearly proportion to VCO free-run frequency.