EasyManuals Logo

Denon DP-37F Series User Manual

Denon DP-37F Series
15 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #8 background imageLoading...
Page #8 background image
EXPLANATION
HOW
THE
LS!
QUARTZ
PLL
MOTOR
CONTROL
OPERATES
©
LSI
motor
control
...
TC9142P.
{33
r.p.m,
is
set
as
the
standard
speed)
©
Due
to
C-MOS
construction,
handle
this
IC
with
ex-
treme
care.
O
Vin
(min)
..0.7
x
Veo
=3.6V
©
Vy
(max.)..,0.3
x
Vee
=
1.5V
©
In
terminals
4,
5,
10,
and
11,
pull-up
resistors
are
built
in,
Terminal
1
:
GND
Terminal
2
:
OSC
OUT
(7.68
MHz)
O13
us”
Terminal
3
:
OSC
IN
(7.68
MHz)
_
Terminal
4
+
Internal
frequency
divider
ratio
switch
and5
Terminals
4
and
5
determine
the
frequency
dividing
ratio
of
the
internal
frequency
divider,
Terminal
6
:
FG
input
T=
1.8
ms
(33
rpm)
=
7.33
ms
(45
rpm)
APC
output
(TP-6)
Phase
control
system
output
of
the
motor
Terminal
7
:
Same
in
either
33
rpm
or
45
rpm
Terminal
8
:
Terminal
10:
Terminal
71
Terminal
42:
Terminal
14:
Terminal
15:
Terminal
16:
AFC
output
Speed
(frequency)
control
system
output
of
the
motor
Same
in
either
33
rpm
or
45
rpm
33/45
rpm
switch
input
L
...
33-1/3
rpm
H,,,
45
rpm
:
PLAY/STOP
input
L
...
PLAY
H
...
STOP
Lock
detector
output
Within
locking
range...
H
| ~
Outside
locking
range
...
L
Reference
frequency
input
(CR
IN)
Connected
to
terminal
15
Reference
frequency
output
{CP
OUT}
In
accordance
with
the
ratio
set
by
terminals
4
and
5,
the
divided
frequency
output
is
obtained,
.
a
7.68
x
10°
+4
=
1.92
MHz
(center
value}
{When
terminal
4:
H
and
terminal
5:
L)
Line
voltage
{Vcc}
Veco:
5V
40.25
V

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Denon DP-37F Series and is the answer not in the manual?

Denon DP-37F Series Specifications

General IconGeneral
BrandDenon
ModelDP-37F Series
CategoryTurntable
LanguageEnglish

Related product manuals