Denon DVD-1920 - Page 27

27
DVD-1920/756
Video Block Diagram
VIDEO SIGNAL DATA(AUDIO) SIGNAL
R(0-7)
ICF02 (SDRAM)
SDRAM
91
103
~
2
13 31 56 74 85
~~~
24 27 60 66
~~
50 87
~
ICF01 (DIGTAL VIDEO CONVERTER)
ICF11 (HDTV VIDEO ENCODER)
SDRAM DATA(0-31)
SDRAM ADDRESS(0-10)
NOISE REDUCER, DEINTERLACER,FRAME RATE CONVERTER AND SDRAM INTERFACE
INPUT PROCESOR WITH AUTO SYNC AND AUTO ADJUST
196
CLOCK GENERATION PLLS
OUTPUT PROCESSOR WITH SYNC GENERATION AND DIGTAL ANALOG CONVERTERS
VERTICAL AND HORIZONTAL ENHANCERS VERTICAL AND HORIZONTAL SCALERS
YC(0-7)
YC(0-7) YC(0-7)
199 205
~
YC(0-7)
140 145
~
148 155
~
136 137
130 135
~
126 127
49 56
~
57 58
~
61 65
~
75 79
~
68 70
~
VIDEO DATA CAPTURE BLOCK AUDIO DATA CAPTURE BLOCK
B(0-7)
G(0-7)
R(0-7)
B(0-7)
G(0-7)
R(0-7)
G(0-7)
119
V-SYNC
118
H-SYNC
V-SYNC
H-SYNC
122
HDMI-DE
125
VCLK
2 1
66 80
XOR MASK
PANEL LINK TRANSMITTER
88VIDEO-Y(I/P)
10 10VIDEO-C
66VIDEO-Cb/Pb 44VIDEO-Cr/Pr
VIDEO-C
JK1401 S-VIDEO OUT
3 4
2
1
YC
WF1
WF3
IC1402 (VIDEO DRIVER)
4dB AMP
2dB AMP
LPF DRIVER
D/A
15
4dB AMP
2dB AMP
LPF DRIVER
9
13
4dB AMP
2dB AMP
LPF DRIVER
11
6
13
IC1403 (VIDEO DRIVER)
4dB AMP
2dB AMP
LPF DRIVER
2dB AMP
DRIVER
4dB AMP
2dB AMP
LPF
DRIVER
3 1
5 6 7
11VIDEO-Y(I)
CN601 CN1601
VIDEO-Y(I)
WF2
TO DIGITAL SIGNAL PROCESS BLOCK DIAGRAM
DVD MAIN CBA UNIT
AV CBA
COMPOSITE VIDEO OUT
VIDEO-Cb/Pb OUT VIDEO-Y OUT VIDEO-Cr/Pr OUT
JK1404
TO AUDIO BLOCK DIAGRAM
HDCP ENCRYPTION ENGINE
HDCP KEYS EEPROM
REGISTERS AND CONFIGURATION
T.M.D.S DATA2-
CNF01
3 1 6 4
HDMI-CONNECTOR
T.M.D.S DATA2+
9 7
10 12
T.M.D.S DATA1- T.M.D.S DATA1+ T.M.D.S DATA0- T.M.D.S DATA0+ T.M.D.S CLOCK+ T.M.D.S CLOCK-
35 36 32 33 29 30 27 26
ICF09 (HDMI INTERFACE)
18
6 5
2 3
71
ICF04 (3.3V<-->5V CONVERTER)
16 15
DDC DATA DDC CLOCK
I2C SLAVE
1920
45 46
I2C-SCL
I2C-SDA
I2C-SCL
I2C-SDA
I2C-SCL I2C-SDA
TO DIGITAL SIGNAL PROCESS BLOCK DIAGRAM
19
18
67 43 44
HPD
QF01
+3.3V
HOT PLUG DETECT
ICF06
1 2
5
(FLIP FLOP)
F/F
3
191
XTAL-IN CLOCK-PULSE
195
CLOCK-PULSE
SPDIF PCM-DATA3 PCM-DATA2 PCM-DATA1 PCM-DATA0 PCM-LRCK PCM-BCK PCM-SCLK
TO DIGITAL SIGNAL PROCESS BLOCK DIAGRAM
5 7 8 9
10 11 12
6
I2C-SCL I2C-SDA
39 38 37 23 24 22 21
32 63
D/A D/A
HDTV VIDEO ENCODER
DEMUX
PLL
53-55, 58-62
4-9,
12,13
16-18,
26-30
B(0-7)
R(0-7)
R(0,1)
G(0-7)
B(2-7)
G(0-7) B(2-7)/R(0,1)
B(0-7)
G(0-7)
SDRAM DATA(0-31)
SDRAM ADDRESS(0-10)
w w w . x i a o y u 1 6 3 . c o m
Q Q
3
7
6 3
1 5 1 5
0 9 9
2
8 9
4 2
9 8
T E L 1 3 9 4 2 2 9 6 5 1 3 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3
Q Q
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