Digilent ZYBO - User Manual

1300 Henley Court
Pullman, WA 99163
509.334.6306
www.digilentinc.com
ZYBO™ FPGA Board Reference Manual
Revised April 11, 2016
This manual applies to the ZYBO rev. B
DOC#: 502-279
Copyright Digilent, Inc. All rights reserved.
Other product and company names mentioned may be trademarks of their respective owners.
Page 1 of 26
Overview
The ZYBO (ZYnq BOard) is a feature-rich, ready-to-use, entry-level embedded software and digital circuit
development platform built around the smallest member of the Xilinx Zynq-7000 family, the Z-7010. The Z-7010 is
based on the Xilinx All Programmable System-on-Chip (AP SoC) architecture, which tightly integrates a dual-core
ARM Cortex-A9 processor with Xilinx 7-series Field Programmable Gate Array (FPGA) logic. When coupled with the
rich set of multimedia and connectivity peripherals available on the ZYBO, the Zynq Z-7010 can host a whole
system design. The on-board memories, video and audio I/O, dual-role USB, Ethernet, and SD slot will have your
design up-and-ready with no additional hardware needed. Additionally, six Pmod ports are available to put any
design on an easy growth path.
The Zynq 7010 AP SoC offers the following features:
 650Mhz dual-core Cortex-A9 processor
 DDR3 memory controller with 8 DMA channels
 High-bandwidth peripheral controllers: 1G Ethernet, USB 2.0, SDIO
 Low-bandwidth peripheral controller: SPI, UART, CAN, I
2
C
 Reprogrammable logic equivalent to Artix-7 FPGA
o 4,400 logic slices, each with four 6-input LUTs and 8 flip-flops
o 240 KB of fast block RAM
o Two clock management tiles, each with a phase-locked loop (PLL) and mixed-mode clock
manager (MMCM)
o 80 DSP slices
o Internal clock speeds exceeding 450MHz
o On-chip analog-to-digital converter (XADC)

Summary

Overview

Power Supplies

Zynq AP SoC Architecture

Zynq Configuration

MicroSD Boot Mode

Procedure for booting the Zynq from a microSD card.

QSPI Boot Mode

Procedure for booting the Zynq from onboard QSPI serial Flash.

JTAG Boot Mode

Procedure for booting the Zynq via JTAG for software loading and debugging.

SPI Flash

DDR Memory

USB UART Bridge (Serial Port)

MicroSD Slot

USB OTG

Ethernet PHY

HDMI Source;Sink Port

VGA Port

Clock Sources

Basic I;O

Audio

Reset Sources

Power-on Reset

Describes the chip's master reset signal triggered by power-on conditions.

Program Push-button Switch

Details the PROG push switch's function to reset the PL and de-assert DONE.

Processor Subsystem Reset

Explains the external system reset for the Zynq PS without disturbing debug.

Pmod Ports

Standard Pmod

Describes standard Pmod ports connected to PL via series resistors for protection.

MIO Pmod

Explains MIO Pmod ports connected to PS MIO bus with series resistors.

Dual Analog;Digital Pmod (XADC Pmod)

Details the JA Pmod connector for auxiliary analog inputs to the PL XADC.

High-Speed Pmod

Describes high-speed Pmods with impedance-matched differential pairs for faster switching.

Digilent ZYBO Specifications

General

Manufacturer	Digilent
Model	ZYBO
Processor	Dual-core ARM Cortex-A9
FPGA	Xilinx Zynq-7000
RAM	512MB DDR3
Storage	MicroSD card slot
HDMI	HDMI output
Expansion	Pmod connectors
Architecture	ARM
USB Ports	USB OTG
Ethernet	10/100/1000 Mbps
Power Supply	5V
Onboard Peripherals	LEDs, buttons, and switches
GPIO	Multiple GPIO pins available through expansion headers