Fairphone 4 - V00 Sheet 19 PMK8003_CLK

PMK8003
UI
GPIO_03
GPIO_01
GPIO_02
GPIO_04
11
24
30
36
PMK-8003-0-FOWPSP36-TR-00-0
U1901
Note:SPMI_CLK & SPMI_DATA should be routed away from noisy traces
Route signals as a diff pair as much as possible
76.8MHz clock , for SDR735
For WIFI
19.2MHz clock , for CXO
19.2MHz clock , for NFC
Note:Dedicated via to main GND layer at both
pin and cap.
Note:Put the cap close to PMIC and away from noise src.
Dedicated via to closest main GND layer at cap.
Note: Soldermask clearance added for clock injection.
PMK8003
VIA to main GND from PMIC PIN7
PMIC_DVDD_BYP
SPMI_CLK
SPMI_DATA
VREG_1P8_SYS
RF_CLK5
LN_BB_CLK1_CXO
LN_BB_CLK3
SLEEP_CLK_32K
LN_BB_CLK2
33ohm
R1901
21
1uF
C1909
2
1
E1902
2 1
PMK_XTAL_OUT
1
2
C1904
1nF
1 2
E1901
1uF
C1902
2
1
1uF
C1903
2
1
VREG_L15A_1P2
FAULT_N
1
2
C1901
1uF
1 2
R1906
0ohm
RF_CLK1
1
2
C1905
1uF
1
2
C1908
1uF
PMK_VREG_BB
1 2
C1906
1uF
1 2
E1904
1uF
C1907
2 1
E1903
21
0ohm
R1908
21
1 2
R1902
0ohm
0ohm
R1909
21
1 2
R1910
0ohm
0ohm
R1907
21
for SM6350 RF_XO_CLK Pin
RTC_ALARM_TO_PM
NM
PX8618_XIN
0ohm
21
R1923
Boot Options
No SD_Card BOOT
SD_Card BOOT
R1922
52.3KOHM
88.7KOHM
Acceptable Resitor Value
50k-54k
85k-93k
Note:Option resitor must have +/-1% toletance
R1922
2 1
51Kohm
C1910
2 1
22pF
C1911
2
1
22pF
NM
PMK8003
HK
RFCLK4
RFCLK2
RFCLK1
LNBBCLK1
NC1
SLEEP_CLK
RFCLK5
RFCLK3
LNBBCLK2
NC2
SPMI_DATA
VREG_BB
NC3
LNBBCLK3
GND_XOADC
FAULT_N
SPMI_CLK
VREG_RF
GND_RF
VDD_ACTIVE
GND
NC4
XTAL_OUT
VREG_XO
GND_XO
VDD_COIN
REF_GND
XTAL_IN
XO_THERM
XDVDD_BYP
VDD_1P8_SYS
REF_BYP
U1901
23
14
10
5
35
34
33
32
31
29
28
27
26
25
22
21
20
19
18
17
16
15
13
12
9
8
7
6
4
3
2
1
PMK-8003-0-FOWPSP36-TR-01-0
1 2
R1951
10Kohm
XTAL1
GND XTAL2
SENSOR
Y1901
4
32
1
7CG07680A00