Freescale Semiconductor MC9S12C Family

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HCS12

Microcontrollers

freescale.com

MC9S12C Family

MC9S12GC Family

Reference Manual

MC9S12C128

Rev 01.24

05/2010

Main Page

Chapter 1 MC9S12C and MC9S12GC Device Overview (MC9S12C128)17
- 1.1 Introduction17
- 1.2 Memory Map and Registers21
- 1.3 Signal Description45
- 1.4 System Clock Description57
- 1.5 Modes of Operation57
- 1.6 Resets and Interrupts60
  - 1.6.1 Vectors60
  - 1.6.2 Resets62
- 1.7 Device Specific Information and Module Dependencies62
- 1.8 Recommended Printed Circuit Board Layout65
Chapter 2 Port Integration Module (PIM9C32) Block Description73
- 2.1 Introduction73
  - 2.1.1 Features73
  - 2.1.2 Block Diagram74
- 2.2 Signal Description76
- 2.3 Memory Map and Registers77
  - 2.3.1 Module Memory Map77
  - 2.3.2 Register Descriptions80
- 2.4 Functional Description104
- 2.5 Initialization Information107
  - 2.5.1 Reset Initialization107
- 2.6 Interrupts108
  - 2.6.1 Interrupt Sources108
  - 2.6.2 Recovery from STOP108
- 2.7 Application Information108
Chapter 3 Module Mapping Control (MMCV4) Block Description109
- 3.1 Introduction109
  - 3.1.1 Features110
  - 3.1.2 Modes of Operation110
- 3.2 External Signal Description110
- 3.3 Memory Map and Register Definition110
  - 3.3.1 Module Memory Map110
  - 3.3.2 Register Descriptions112
- 3.4 Functional Description122
Chapter 4 Multiplexed External Bus Interface (MEBIV3)129
- 4.1 Introduction129
  - 4.1.1 Features129
  - 4.1.2 Modes of Operation131
- 4.2 External Signal Description131
- 4.3 Memory Map and Register Definition133
  - 4.3.1 Module Memory Map134
  - 4.3.2 Register Descriptions134
- 4.4 Functional Description150
Chapter 5 Interrupt (INTV1) Block Description157
- 5.1 Introduction157
  - 5.1.1 Features158
  - 5.1.2 Modes of Operation158
- 5.2 External Signal Description159
- 5.3 Memory Map and Register Definition159
  - 5.3.1 Module Memory Map159
  - 5.3.2 Register Descriptions159
- 5.4 Functional Description161
  - 5.4.1 Low-Power Modes162
- 5.5 Resets162
- 5.6 Interrupts162
- 5.7 Exception Priority163
Chapter 6 Background Debug Module (BDMV4) Block Description165
- 6.1 Introduction165
  - 6.1.1 Features165
  - 6.1.2 Modes of Operation166
- 6.2 External Signal Description167
- 6.3 Memory Map and Register Definition168
  - 6.3.1 Module Memory Map168
  - 6.3.2 Register Descriptions169
- 6.4 Functional Description174
Chapter 7 Debug Module (DBGV1) Block Description191
- 7.1 Introduction191
- 7.2 External Signal Description195
- 7.3 Memory Map and Register Definition196
  - 7.3.1 Module Memory Map196
  - 7.3.2 Register Descriptions196
- 7.4 Functional Description212
- 7.5 Resets222
- 7.6 Interrupts222
Chapter 8 Analog-to-Digital Converter (ATD10B8C) Block Description223
- 8.1 Introduction223
- 8.2 Signal Description225
- 8.3 Memory Map and Registers226
  - 8.3.1 Module Memory Map226
  - 8.3.2 Register Descriptions230
- 8.4 Functional Description245
  - 8.4.1 Analog Sub-block245
  - 8.4.2 Digital Sub-block246
- 8.5 Initialization/Application Information247
  - 8.5.1 Setting up and starting an A/D conversion247
  - 8.5.2 Aborting an A/D conversion248
- 8.6 Resets248
- 8.7 Interrupts249
Chapter 9 Clocks and Reset Generator (CRGV4) Block Description251
- 9.1 Introduction251
- 9.2 External Signal Description253
- 9.3 Memory Map and Register Definition254
  - 9.3.1 Module Memory Map254
  - 9.3.2 Register Descriptions255
- 9.4 Functional Description266
- 9.5 Resets282
- 9.6 Interrupts286
Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)287
- 10.1 Introduction287
- 10.2 External Signal Description289
- 10.3 Memory Map and Register Definition290
- 10.4 Functional Description323
- 10.5 Initialization/Application Information341
  - 10.5.1 MSCAN initialization341
Chapter 11 Oscillator (OSCV2) Block Description343
- 11.1 Introduction343
  - 11.1.1 Features343
  - 11.1.2 Modes of Operation343
- 11.2 External Signal Description344
- 11.3 Memory Map and Register Definition346
- 11.4 Functional Description346
  - 11.4.1 Amplitude Limitation Control (ALC)346
  - 11.4.2 Clock Monitor (CM)346
- 11.5 Interrupts346
Chapter 12 Pulse-Width Modulator (PWM8B6CV1) Block Description347
- 12.1 Introduction347
- 12.2 External Signal Description348
- 12.3 Memory Map and Register Definition349
  - 12.3.1 Module Memory Map349
  - 12.3.2 Register Descriptions351
- 12.4 Functional Description371
  - 12.4.1 PWM Clock Select371
  - 12.4.2 PWM Channel Timers374
- 12.5 Resets381
- 12.6 Interrupts381
Chapter 13 Serial Communications Interface (S12SCIV2) Block Description383
- 13.1 Introduction383
- 13.2 External Signal Description385
  - 13.2.1 TXD-SCI Transmit Pin385
  - 13.2.2 RXD-SCI Receive Pin385
- 13.3 Memory Map and Registers386
  - 13.3.1 Module Memory Map386
  - 13.3.2 Register Descriptions386
- 13.4 Functional Description394
- 13.5 Initialization Information409
Chapter 14 Serial Peripheral Interface (SPIV3) Block Description413
- 14.1 Introduction413
- 14.2 External Signal Description414
- 14.3 Memory Map and Register Definition415
  - 14.3.1 Module Memory Map415
  - 14.3.2 Register Descriptions416
- 14.4 Functional Description423
- 14.5 Reset433
- 14.6 Interrupts433
Chapter 15 Timer Module (TIM16B8CV1) Block Description435
- 15.1 Introduction435
- 15.2 External Signal Description438
- 15.3 Memory Map and Register Definition439
  - 15.3.1 Module Memory Map439
  - 15.3.2 Register Descriptions441
- 15.4 Functional Description457
- 15.5 Resets461
- 15.6 Interrupts461
Chapter 16 Dual Output Voltage Regulator (VREG3V3V2) Block Description463
- 16.1 Introduction463
- 16.2 External Signal Description465
- 16.3 Memory Map and Register Definition466
  - 16.3.1 Module Memory Map466
  - 16.3.2 Register Descriptions467
- 16.4 Functional Description467
- 16.5 Resets469
  - 16.5.1 Power-On Reset469
  - 16.5.2 Low-Voltage Reset469
- 16.6 Interrupts469
  - 16.6.1 LVI - Low-Voltage Interrupt469
Chapter 17 16 Kbyte Flash Module (S12FTS16KV1)471
- 17.1 Introduction471
- 17.2 External Signal Description472
- 17.3 Memory Map and Registers473
  - 17.3.1 Module Memory Map473
  - 17.3.2 Register Descriptions475
- 17.4 Functional Description486
Chapter 18 32 Kbyte Flash Module (S12FTS32KV1)503
- 18.1 Introduction503
- 18.2 External Signal Description504
- 18.3 Memory Map and Registers505
  - 18.3.1 Module Memory Map505
  - 18.3.2 Register Descriptions508
- 18.4 Functional Description520
Chapter 19 64 Kbyte Flash Module (S12FTS64KV4)537
- 19.1 Introduction537
- 19.2 External Signal Description539
- 19.3 Memory Map and Registers539
  - 19.3.1 Module Memory Map539
  - 19.3.2 Register Descriptions545
- 19.4 Functional Description557
Chapter 20 96 Kbyte Flash Module (S12FTS96KV1)575
- 20.1 Introduction575
- 20.2 External Signal Description577
- 20.3 Memory Map and Registers577
  - 20.3.1 Module Memory Map577
  - 20.3.2 Register Descriptions583
- 20.4 Functional Description595
Chapter 21 128 Kbyte Flash Module (S12FTS128K1V1)613
- 21.1 Introduction613
- 21.2 External Signal Description614
- 21.3 Memory Map and Registers615
  - 21.3.1 Module Memory Map615
  - 21.3.2 Register Descriptions618
- 21.4 Functional Description630
Appendix A Electrical Characteristics647
- A.1 General647
- A.2 ATD Characteristics658
- A.3 MSCAN663
- A.4 Reset, Oscillator and PLL663
- A.5 NVM, Flash, and EEPROM669
  - A.5.1 NVM Timing669
  - A.5.2 NVM Reliability672
- A.6 SPI673
  - A.6.1 Master Mode673
  - A.6.2 Slave Mode675
- A.7 Voltage Regulator677
Appendix B Emulation Information679
- B.1 General679
  - B.1.1 PK[2:0] / XADDR[16:14]680
Appendix C Package Information681
- C.1 General681
Appendix D Derivative Differences685
Appendix E Ordering Information686

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General

Brand	Freescale Semiconductor
Model	MC9S12C Family
Category	Microcontrollers
Language	English

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