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Fujitsu ALL Series - Table of Contents; Contents

Fujitsu ALL Series
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EXTERNAL INTERRUPTS
Contents
MCU-AN -300203-E-V17 - 4 - © Fujitsu Microelectronics Europe GmbH
Contents
REVISION HISTORY............................................................................................................ 2
WARRANTY AND DISCLAIMER ......................................................................................... 3
CONTENTS .......................................................................................................................... 4
1 INTRODUCTION.............................................................................................................. 5
1.1 Key Features........................................................................................................... 5
2 EXTERNAL INTERRUPTS .............................................................................................. 6
2.1 Block Diagram......................................................................................................... 6
2.2 Connection Diagram................................................................................................ 6
2.3 Register................................................................................................................... 7
2.3.1 External Interrupt Enable Register (ENIR) ................................................. 7
2.3.2 External Interrupt Request Register (EIRR) ............................................... 7
2.3.3 Request Level Setting Register (ELVR)...................................................... 7
2.3.4 Port Input Enable Register......................................................................... 7
3 EXTERNAL INTERRUPT TIMING ................................................................................... 8
4 EXTERNAL INTERRUPT EXAMPLES ............................................................................ 9
4.1 Basic Functionality .................................................................................................. 9
4.2 Disturbed Signals .................................................................................................. 10
4.2.1 Sequence Diagram.................................................................................. 11
4.2.2 External Interrupts and DMA.................................................................... 14
4.3 External Interrupts and Wake Up from Stop Mode................................................. 14
4.3.1 Example I ................................................................................................ 14
4.3.2 Example II................................................................................................ 17
5 ADDITIONAL INFORMATION ....................................................................................... 18
LIST OF FIGURES ............................................................................................................. 19
LIST OF TABLES............................................................................................................... 20

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