Grant OPTIMA RANGE GD100 User Manual

IC9
AT89C55
IC7
LED DRIVER
IC3
AD7706
IC10
25LC080P
IC6
4040
IC8
D/A
IC1
LM358N
C16
0µ1
C35
10µF
C20
0µ1
C23
0µ1
C26
0µ1
C19
0µ1
C21
0µ1
C33
0µ1
C1
22pF
C2
22pF
13
SW1
(F)
SW2
(S)
12
5
C4
1000pF
R4
47R
RP2a
10K
RP2c
10K
RP2b
10K
RP2d
10K
R21
47R
REF IN
RST
DATA
IN
DATA
EN
CLK
RP4b
10K
RP4c
10K
RP4d
10K
R12
39K
RP4a
10K
0V
0V
0V
0V
0V
0V
+5V
+5V
+5V
+5V
+5V
+5V
XT1
C28
10µ
C10
0µ1
C25
0µ1
C9
10µ
C30
0µ1
PL5/1
PL5/2
PL1/1
PL1/2
PL1/3
D3
1N4006
D2
1N4006
D1
3V3
L2
4
4
11
21
5
22
1
6
2
7
10
11
8
16
1
CLK
9
7
R5
2K2
TR1
ZVP2110AD
R1
2K2
6
4
3
2
1
18
15
19
12
16
34
35
26
21
21
3
SCK
S1
S0
7
6
2
5
1
4
ENCODER
22
23
23
20
1
22
19
8888
VR1
20K
LED4
x100
+5V
LED3
x10
LED2
x1
LED1
x0.1
40
7
25
7
6
2
4
5
3
1
3
1
2
7
8
6
5
C36
10µ
0V
PL7/1
PL7/3
PL7/4
PL7/5
C11
0µ01
C15
0µ01
RP3f
10K
RP3e
10K
+5V
8
VCC
WP
CS
HOLD
0V
+5V
8
PL7/7
0V IN
IC1
OPTO
ISOLATOR
PL7/2
PL7/6
12V UNREG
IN
0V
6
0V
27
R3
10K
+5V
11
PROBE
I/P
10
8
20
9
0V
C32
0µ1
C29
10µ
C12
0µ1
0V IN
+5V REG IN
+5V REG IN
Fig. 2 Display Circuit Diagram GD100/100L/120/120L
0V
0V
+5V
IC10 is mounted
under IC9 on
the PCB
PL1 for
Test purposes
only
RP3h
10K
32
0V
A/D
PROCESSOR
C3
1000pF
4
GD100/GD120
Part No. 17592/Issue 1 July 2002
Page 20

Grant OPTIMA RANGE GD100 Specifications

General

Brand	Grant
Model	OPTIMA RANGE GD100
Category	Temperature Controller
Language	English