1/11September 2004
■ 5V TOLERANT INPUTS
■ HIGH SPEED:
t
PD
= 5.2ns (MAX.) at V
CC
= 3V
■ POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN) at V
CC
= 3V
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
■ OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 32
■ LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
■ ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LCX32 is a low voltage CMOS QUAD
2-INPUT OR GATE fabricated with sub-micron
silicon gate and double-layer metal wiring C
2
MOS
technology. It is ideal for low power and high
speed 3.3V applications; it can be interfaced to 5V
signal environment for inputs.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LCX32
LOW VOLTAGE CMOS QUAD 2-INPUT OR GATE
WITH 5V TOLERANT INPUTS
Figure 1: Pin Connection And IEC Logic Symbols
Table 1: Order Codes
PACKAGE T & R
SOP 74LCX32MTR
TSSOP 74LCX32TTR
TSSOPSOP
Rev. 6
AVR 355/230 Service Manual
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