Hitachi AP1 - Page 100

HMCS46C,HMCS46CL-------------------------------------------------------
LSI
Internal
Tock (tI>1
~tI>2
LRA. LRB [
Instruction
Pattern [
Instruction
LAR. LBR [
Instruction
Output Function
,. --------------,
n = 0 - 3
Rn,
Data
---f------------ Input Function
All bits are
set
to "1" by the
reset function To the accumulator and the B register
Figure 14 4-bit Data I/O Block Diagram
/
o ne
nstructlon
C I
yce
'\
I I
I
I
-
r--l r---J r-l
r-L
-
Rn Output Instruction
Rn
-
Pattern Instruction
(second cycle)
R2.R3
Rn
Input
Instruction
r---L
Rn Sampling Clock
Figure 15 4-bit Data I/O Timing
Set Signal by the reset function
Set Instruction
On
Reset Instruction ------t
Latch
Test
IN
Figure 16 1-bit Discrete I/O Block Diagram
98