Hitachi AP1 - Page 126

HMCS47C,HMCS47CL------------------------------------------------------
(a) RO to R5
(b) R6
LSI
Intllnal
TOCk (q,1
~q,2
LRA. LRB [
Instruction
p,ttern
[
Instruction
LAR,LBR [
Instruction
Output Function
:--------------~
n-Oto5
2'
~ ~~'--------~--~
Rn,
2'
Rn,
Data
2'
Rn,
, ,
I I ,.. __ _
I 'I
L--t-----------'" : I Input Function
.
I 2
u
21 22 23:
All botsare ~ _________ .J
set to "I" by the
reset function
To the accumulator and the B register
~(
/
2,
2,
2,
2.
Output Function
r- - ---- - ---------1
,
,
,
I
~ ___ ~----_-----_J
All billare
set to "0" by the
_function
Figure 14 4·bit Data I/O Block Diagram
o Itt' C I ne n. rue Ion
VC e
\
-
r---1 r---l r----I
-
Rn Output Instruction
Rn
-
Plttern I n.!ructlon
(,econd
eve lei
R2. R3
r---1
Rn
Input
I
n.truction
Rn Sampling Clock
Figure 15 4·bit Data I/O Timing
Set Signel by the reset function
Set Instruction
On
R_t Instruction-----I
Figure 16 1·bit Discrete I/O Block Diagram
124
IL
I---