LCO-III---------------------------------
tached externally. Therefore, the DI4/XO and DIs
IXI
terminals should not be used
as
general I/O's, but
as
XO
and
XI
terminals for connecting cyrstal oscillator.
Resetting
of
the DIs latch by RED instruction generates
internal halt state. Return from internal halt
is
effected
by
overflow signals
of
the prescaler. 16Hz overflow
signals
are output from the pre scaler
if
a crystal oscil-
lator
of
32.768kHz
is
connected to the DI4/XO and
DIS
IXI
terminals.
When
an overflow signal
is
issued, the
DIs latch
is
set to
"1"
from
"0",
the LCD-III returns
from halt state, adds 1 to the timer register, and execution
restarts from the instruction next
to
the RED instruc-
tion.
Note that external halt caused by the HLT terminal
cannot
be
released by prescaler overflow signals.
I
Becomes
halt
state
after
executing
RED
instruction and the
halt
is
maintained
___
L_V_I_
.......
15
until
a prescaler
overflow
signal
is
issued.
L-~R~ED~-I------~----~.
TO
LVI
0
~
BR
.-4
The
LCD-III
returns
from
halt state
by
a
prescaler overflow signal and operation
restarts
from
LV
I instruction. With this
program, unless the
Do
terminal
is
set
to
"0".
internal halt state occurs repeatedly.
Figure 28
Program
example in the Internal Halt Mode
4>.
L..J
u
u
q,,~------
~
Program
~
V---------
n
+ 1
Counter
.!!..:.!..J\,--_n
__
,,---
_..:...
_______
...i
X
n+2
x::::
VCC
HLT
GND
~~~ess~~n~+~1
____
_
X
n+2
X
n+1
X
x:::!!£i:
Figure 29 Internal Halt Timing Chart
VIH
4.5V
21'--
---
--
-----------i---
4
.
5V
.--------.-
-,VDH
~
~C
~-------------------tHLT---------------------+~
Figure 30 External Halt Timing Chart
168
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