EasyManua.ls Logo

Hitachi AP1 - Page 245

Hitachi AP1
378 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
----------------------------------------------------------------HMCS404C
Table 15. TIMER-B Interrupt Request
Flag
TIMER-B Interrupt
Request
Flag
o
Interrupt Request
No
Yes
Table 16. TIMER-B Interrupt
Mask
TIMER-B Interrupt
Mask
o
• INPUT/OUTPUT
I
nterrupt Request
Enable
Disable (Mask)
The MeU provides 58 Input/Output pins, and they are con-
sist
of
32
standard pins and 26 high voltage pins. Each standard
pin may have one
of
three mask options: (A) "Without pull-
up
MOS
(NMOS open drain)",
(8)
"With pull-up MOS", or
(C) "CMOS". And also each high voltage pin may have one
of
two mask options: (D) "Without pull-down
MOS
(pMOS
Pull
up
MOS
(e)
approximately
40kn
to
160kn
NMOS(A)
open drain)", or (E) "With pull-down MOS".
As
pull-down
MOS
is
connected
to
internal V disp line, select RAl
IV
dmp
pin
as
V disp with mask option when at least one high voltage pin
is
selected as "With pull-down MOS" option.
When any
Input/Output
common pin
is
used
as
input
pin,
it
is
necessary
to
select the mask option and
output
data as shown
in Table
18.
•
Output
Circuit Operation of Standard Pins with ''With pull-
-up
MOS" Option
Fig. 15 shows the circuit used
in
the standard pins with
"with pull-up MOS"option.
8y
execution
of
the
output
instruction, the write pulse will
be generated, and be applied
to
the addressed port. This pulse
will turn
"ON"
the
PMOS
(8)
to make the transient time
shorten
to
obtain "High level",
if
the
output
data
is
changed
from
"0"
to
"1".
In this case, the "write pulse" allows the
PMOS
(8)
to
tum
"ON"
as
long
as
1/8 instruction cycle.
While
"write pulse"
is
"0",
pull-up
MOS
(C) may retain the
output
in
high level.
The HLT signal becomes
"0"
in
stop mode, so
that
MOS
(A)
(8)
(C)
tum
"OFF".
Write pulse
(Output
.---f--------
instruction)
t----+-------9"--
HL T
Data
1 Instruction
cycle
~I
Output
instruction execution
Write
pulse
___
----'n'----_
Fig. 15 Output Circuit Operation
of
Standard
Pins
with
"with
Pull-up MOS" OPtion
243