Hitachi AP1 - Page 246

HMCS404C----------------------------------------------------------------
Table 17 I/O Pin Circuit Type
Without pull-up MOS
With pull-up MOS Applied
(NMOS open drain)
CMOS (C)
(A)
(B)
pins
~
input
~'OP",
Jf;'OP"'
I/O
data
V. data write V. data
Do -03,
~~
ee
R30 -R33,
common
~HLT
pins
HLT
R40 -R43 ,
HLT
~utPut
Rso -RS3
output
output
data
data
data
III
r::
~~~
Vee
'Q.
R
60
-R
63
,
'E
Output
pulse
cr1~HLT
nI pins
HLT
R
70
-R
73
,
~
~~HLT
R
ao
-R
a3
c
~
output
output
output
data
data
data
Vee
InpiJt
~
H~
pins
input
HL T input
R
90
-R
93
data
data
Without pull-down MOS
With pull-down MOS (E)
Applied pins
(PMOS open drain) (D)
Vee
~~HLT
~HLT
I/O
0-
output
o output
04-
0
1S,
common
data
data
R
IO
-R
l3
,
pins
Vee
R
lO
-R
l3
HL~ input
Vdisp
HLT
input
-... data
data
...
Vee
c
Vee
'Q.
~KJ=HLT
III
cJK]::HLT
0)
output
:!
Output
output
data
g
data
pins
R
oo
-R
03
.s:;
Vee
,21
:I:
Vdisp
Input
~input
~IO~'
RAO,
data
data
pins
Vee
RA1
IV
disp
Vdisp
(Note)
In the stop mode, HLT signal is "0" and I/O pins are in high impedance state,
(to be continued)
244