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Hitachi AP1 - Page 285

Hitachi AP1
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--------------------------------------------------------------HD614P080S
I"
Stop
mode .j
:::~~k
~~_lmrrjlll_lmrrllll_I""'II~~mll~IIII1-1
__
~U
..
------ISI~I
t
1"-
tres
STOP
instruction
execution
(more than
stabilization
time:
tRC)
Fig.19
Stop
Mode Cancel
Timing
Chart
•
RAM
ADDRESSING MODE
As
shown in Fig. 20, the
MeV
provides three
RAM
address-
ing modes; Register Indirect Addressing, Direct Addressing and
Memory Register Addressing.
• Register Indirect Addressing
The combined lO-bit
contents
of
W Register, X Register and
Y Register is used as the
RAM
address
in
this mode.
RAM Address
• Direct Addressing
The direct addressing instruction consists
of
two words and
the second word
(l0
bits) following Op-code
(the
first
word)
is
used as the
RAM
address.
• Memory Register Addressing
The Memory Register Addressing can access 16 digits
(Memory Register: MR) from
$020
to
$02F
by using the LAMR
and XMRA instruction.
W·Register X-Register
V-Register
".-------
(a)
Register
Indirect
Addressing
Instruction
1 st
Word
Instruction
2nd
Word
(b)
Direct
Addressing
Instruction
"0" "0" "0" "0"
·"1"
"0"
RAM Address
(c)
Memory
Register Addressing
Fig.
20
RAM
Addressing Mode
283