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Hitachi AP1
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HD614P080S---------------------------------------------------------------
•
ROM
ADDRESSING MODE AND P INSTRUCTION
The
MCV
has four kinds
of
ROM
addressing modes as shown
in Fig. 21.
• Direct Addressing Mode
The
program can branch to any addresses in the
ROM
memory space
by
using JMPL, BRL or CALL instruction.
These instructions replace 14-bit program
counter
(PC
13
to
PCO) with 14-bit immediate data.
• Current Page Addressing Mode
ROM
memory space is divided
into
256 words in each page
starting from
$0000.
The program branches
to
the address in
the same page using BR instruction. This instruction replace
the
low-order eight bits
of
program
counter
(pC7
to
PeO)
with
(JMPL)
(BRL)
(CALL)
Instruction
1st
Word
OP
Code
Program
Counter
8-bit immediate data.
• Zero Page Addressing Mode
The program branches
to
the zero page subroutine area,
which
is
located on
the
address from
$0000
to
$003F,
using
CAL instruction. When CAL instruction
is
executed, 6-bit
immediate data
is
placed in low-order six bits
of
program
counter
(PC5
to
PCO)
and "D's" are placed in high-order eight
bits
(pC
13
to
PC6). The branch destination by BR instruction
on the boundary between pages
is
given
in
Fig. 23.
• Table Data Addressing
The program branches to the address determined by
tht
contents
of
the 4-bit immediate data, accumulator and B regis
ter, using TBR instruction.
Instruction
2nd
Word
(a)
Direct Addressing
(TBR)
Instruction
(b) Current
Page
Addressing
Instruction
Program
Counter
~~--~--~~--~--~--~~--~----~--~--~~
(c) Zero
Page
Addressing
Instruction
Program Counter
~~~~~~--~~--~~--~~--~~~~~
(d) Table Data Addressing
Fig.
21
ROM Addressing Mode
284