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Hitachi AP1 - Page 329

Hitachi AP1
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--------------------------------------------------------------------------
HMCS404AC
(P)
OP
Code
B Register
Accumulator
"0"
"0"
Referred
ROM
Address
RA
13
RA
Il
RAllRAlO
RA9
RAa
(a)
Address Designation
:
If
RO
s
= 1
:
If
R0
9
= 1
(b)
Pattern Output
Fig.
23
P Instruction
• P
Instruction
The
P instruction refers
ROM
data addressed
by
Table Data
Addressing.
ROM
data addressed
also
determine its destination.
When
bit 8
in
referred
ROM
data
is
"I",
8 bits
of
referred
~--B-R-"-'---
~::~n-1I+25S
NOP
SR
AAA
256n+254
~~B:::..R.:.:8B::..8
__
-----I~~:~n:21~5
Fig.24
The Branch Destination by
BR
Instruction
on
the Boundary between
Pages
327
ROM
data
are
written into the accumulator and B Register.
When
bit 9
is
"I",
8 bits
of
referred
ROM
data
are
written into
the RI and
R2
port output register.
When
both bit 8 and 9
are
"I",
ROM
data
are
written into the accumulator and B Register
and
also
to the RI and
R2
port output register
at
a
same
time.
The
P instruction
has
no
effect on the program counter.
• INSTRUCTION
SET
The
HMCS400
series provide 99 instructions. These instruc-
tions
are
classified into 10 groups
as
follows;
(1) Immediate Instruction
(2) Register-to-Register Instruction
(3)
RAM
Address Instruction
(4)
RAM
Register Instruction
(5) Arithmetic Instruction
(6) Compare Instruction
(7)
RAM
Bit
Manipulation Instruction
(8)
ROM
Address Instruction
(9) Input/Output Instruction
(10) Control Instruction