Intel 80287 - Page 284

THE 80286 INSTRUCTION SET
Following is a listing of the protected-mode checks and actions taken in the loading of a segment
register:
If SS is loaded:
If selector
is null then #GP(O)
Selector index must be within its descriptor table limits else
#GP (selector)
Selector's RPL must equal CPL else
#GP (selector)
AR byte must indicate a writable data segment else #GP (selector)
DPL
in the AR byte must equal CPL else #GP (selector)
Segment must be marked PRESENT else
#SS (selector)
Load
SS with selector
Load
SS cache with descriptor
If
ES or DS is loaded with non-null selector
Selector index must be within its descriptor table limits else
#GP (selector)
AR byte must indicate data or readable code segment else #GP (selector)
If data
or non-conforming code, then both the RPL and the
CPL must be less than
or equal to DPL in AR byte else #GP (selector)
Segment must
be marked PRESENT else #NP (selector)
Load segment register with selector
Load segment register cache with descriptor
If
ES or DS is loaded with a null selector:
Load segment register with selector
Clear descriptor valid bit
PROTECTED MODE EXCEPTIONS
If a segment register is being loaded, #GP, #SS, and #NP, as described in the listing above.
Otherwise, #GP(O) if the destination
is in a non-writable segment. #GP(O) for an illegal memory operand
effective address
in the CS, DS, or ES segments; #SS(O) for an illegal address in the SS segment.
REAL ADDRESS MODE EXCEPTIONS
Interrupt 13 for a word operand at offset OFFFFH.
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