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Intel 80386

Intel 80386
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CHAPER
8
I/O
INTERFACING
The 80386 supports 8-bit, 16-bit, and 32-bit
I/O
devices that can be mapped.into either the
64-kilobyte
I/O
address space or the 4-gigabyte physical memory address space. This chapter
presents the issues to consider when designing an interface to an
I/O
device. Mapping
as
well
as
timing considerations are described. Several examples illustrate the design concepts.
8.1
I/O
MAPPING VERSUS MEMORY MAPPING
I/O
mapping and memory mapping of
I/O
devices differ
in
the following respects:
The address decoding required to generate chip selects for I/O-mapped devices
is
often
simpler than that required for memory-mapped devices. I/O-mapped devices reside in the
I/O
space of the 80386 (64 kilobytes); memory-mapped devices reside
in
a much larger
memory space (4 gigabytes) that makes use of more address lines.
Memory-mapped devices can be accessed using any 80386 instruction,
so
I/O-to-memory,
memory-to-I/O, and
I/O-to-I/O
transfers
as
well
as
compare and test operations can be
coded efficiently. I/O-mapped devices can be accessed only through the IN,
OUT, INS,
and
OUTS instructions. All
I/O
transfers are performed via the AL (8-bit), AX (16-bit),
or EAX (32-bit) registers. The first 256 bytes of the
I/O
space are directly addressable.
The entire 64-kilobyte
I/O
space
is
indirectly addressable through the DX register.
Memory mapping offers more flexibility in protection than
I/O
mapping does. Memory-
mapped devices are protected by memory management and protection features. A device
can be inaccessible to a task, visible but protected, or fully accessible, depending
on
where
the device
is
mapped in the memory space. Paging provides the same protection levels for
individual 4-kilobyte pages and indicates whether a page has been written to. The
I/O
privilege level of the 80386 protects I/O-mapped devices
by
either preventing a task from
accessing any
I/O
devices or by allowing a task to access all
I/O
devices. A virtual-8086-
mode
I/O
permission bitmap can be used to select the privilege level for a combination
of
I/O
bytes.
8.2
8-BIT, 16-BIT, AND 32-BIT
I/O
INTERFACES
The 80386 can operate with 8-bit, 16-bit, and 32-bit peripherals. The interface to a periph-
eral device depends not only upon data width, but also upon the signal requirements of the
device and its location within the memory space or
I/O
space.
8.2.1
Address Decoding
Address decoding to generate chip selects must be performed whether
I/O
devices are
I/O-mapped or memory-mapped. The decoding technique should be simple
to
minimize the
amount of decqding logic.
8-1

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