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Intel 80386

Intel 80386
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MUL TIBUS® I AND
80386
Figure
9-8
shows the strapping configurations required to implement each of these four
techniques.
The operating mode of one bus arbiter affects the throughput of both the individual subsys-
tem
as
well
as
other subsystems
on
MUL
TIBUS I. This
is
because the delay required to
transfer
MUL
TIBUS I control from one bus arbiter to another affects all subsystems waiting
to use
MUL
TIBUS I. Therefore, the most efficient operating mode depends on how often a
subsystem accesses
MULTIBUS I and how this frequency compares to that of the other
subsystems.
o Mode 1
is
adequate for a subsystem
that
needs
MUL
TIBUS I access only occasionally.
By
releasing
MUL
TIBUS I after each bus cycle, the subsystem minimizes its impact on
other subsystems
that
use
MUL
TIBUS I.
82289
RESET_
RESET
MODE
1
82289
RESET I
RESET
L ALWAYS/CBQLCI<
MODE 3
82289
RESET--.-.
RESET
Vee
____
ALWAYS/CBOCCK
~
PA~~6LEL
DATA
OR
ADDRESSABLE
LATCH
ENABLE_
MODE
2
82289
RESET
RESET
Q » ALWAYS/CBOCCK
-0
IL...-_O<
.......
--MUL
TlBUS@BCLK
*
WHEN
LOW,
82289
IN
MODE 3;
WHEN
HIGH,
82289
IN
MODE 2
210760·117
Figure
9-8.
Operating
Mode
Configurations
9-13

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