Intel 80386

LOCAL BUS CONTROL PAL DESCRIPTIONS
module
title
'80386 Local Bus Controller - pall Intel Corp'
BC386Pl
" Constants:
ON
OFF
H
L
x
c
device 'P16R8';
1;
0;
1;
0;
.x. ;
.c. ;
"use a 16R8 B-speed PAL for 16MHz 386
" ABEL 'don't care' symbol
" ABEL 'clocking input' symbol
" state definitions for BUSSTATE (bus cycle state):
IDLEBUS
PIPE BUS
ACTIVE BUS
ILLEGALBUS
AbOI;
"blO;
"'bOOi
"bll;
"bus is idle or first CLK of unpipelined
"first CLK of pipelined cycle
"subsequent CLKs of active bus
"unused
" state definitions for LOCALSTATE (local cycle state):
WAITING
SAMPLECS
CMDDELAY
IO
ENDIO
MEMORY
FLOAT
NOT LOCAL
"bIOI;
"blOO;
"bOOO;
"bOlO;
"bllO;
"ball;
"bIll;
"bOOl;
"waiting for next bus cycle
"CLK2 before ALE falls and CS is sampled
"delay before CMD active
"IO CMD active
"IO CMD inactive
"lWS CMD active
"data bus float delay
"OWS cycle or bus cycle not to the local bus
" state definitions for SEQUENCE (local cycle sequence counter):
SEQO
SEQI
SEQ2
SEQ3
II Pin names:
CLK
ADS
READY
WR
CSOWS
CSIWS
CSIO
RESET
CLK2
OE
NA
IDLE
PIPE
L2
Ll
La
Ql
QO
BUSSTATE
LOCALSTATE
SEQUENCE
pin
pin
pin
pin
pin
pin
pin
pin
pin
pin
pin
pin
pin
pin
pin
pin
pin
pin
"bOO
"bOl
"bll
"blO
2 ;
3 ;
4 ;
5;
6;
7;
8;
9;
1;
11;
"
Input pins
"
82384 CLK
"
80386 ADS#
"
80386 READY#
"
80386 W/R#
" chip-select
for o wait-state
(piped)
devices
" chip-select
for 1 wait-state (piped)
devices
" chip-select
for peripheral devices
" 80386/82384
RESET
"
Clock pin - 82384
CLK2
" output Enable pin
" Output pins
19;
18;
17;
16;
15;
14;
13;
12;
" NEXT ADDRESS (NA) for lWS and IO devices
" bus state: IDLE or first CLK of unpiped cycle
" bus state: first CLK of pipelined cycle
" local cycle state
" local cycle state
" local cyc;:le state
" local cycle sequence counter
" local cycle sequence counter
[PIPE, IDLE];
[L2, Ll, LO];
[Ql, QO];
" bus cycle state
" local cycle state
" local cycle sequence counter
Figure A-1. PAL-1 State Listings
A-3