COPROCESSOR HARDWARE INTERFACE
5.4
DESIGNING
AN
UPGRADABLE
80386
SYSTEM
It
is
relatively simple to design an 80386 system with an 80287 that may be later upgraded
to an
80387. The advantage of such a system
is
that two performance levels may be addressed
by one system
at
minimal additional cost.
5.4.1
80287180387
Recognition
5.4.1.1 HARDWARE RECOGNITION
OF
THE NPX
The 80386 identifies the type of its coprocessor (80287 or 80387) by sampling its
ERROR#
input some time after the falling edge of
RESET
and before executing the first ESC instruc-
tion. The
80287 keeps its
ERROR#
output in inactive state after hardware reset; the 80387
keeps its
ERROR#
output in active state after hardware reset. The 80386 records this
difference in the
ET
bit of control register zero (CRO). The 80386 subsequently uses
ET
to
control its interface with the coprocessor.
If
ET
is
set, it employs the 32-bit protocol of the
80387;
if
ET
is
not set, it employs the 16-bit protocol of the 80287.
Systems software can (if necessary) change the value of ET. There are three reasons
that
ET may not be set:
1.
An 80287
is
actually present.
2.
No
coprocessor
is
present.
3.
An 80387
is
present
but
it
is
connected in a nonstandard manner that does not trigger the
setting of ET.
An example of case three
is
a
PC
/ AT -compatible design. In such cases, initialization software
may need to change the value of ET.
5.4.1.2
SOFTWARE RECOGNITION
OF
THE NPX
Figure 5-4 shows an example of a recognition routine
that
determines whether an
NPX
is
present, and distinguishes between the 80387 and the 8087/80287. This routine can be
executed on any
80386, 80286, or 8086 hardware configuration that has an
NPX
socket.
The example guards against the possibility of accidentally reading an expected value from a
floating
data
bus when
no
NPX
is
present.
Data
read from a floating bus
is
undefined.
By
expecting to read a specific bit pattern from the
NPX,
the routine protects itself from the
indeterminate state of the bus. The example also avoids depending on any values in reserved
bits, thereby maintaining compatibility with future numerics coprocessors.
5-8
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