Intel Cyclone 10 GX FPGA - Page 11

Board Label Switch Default Position Function
S5.2 OPEN/OFF/1 Enable Intel Cyclone 10 GX
FPGA JTAG
S6 S6.1 OPEN/OFF/1 Reserved, no function
defined
S6.2 OPEN/OFF/1 Reserved, no function
defined
S9 S9.1 OPEN/OFF/1 User available Digital Input 0
S9.2 OPEN/OFF/1 User available Digital Input 1
S15 S15.1 OPEN/OFF/1 User available Digital Input 2
S15.2 OPEN/OFF/1 User available Digital Input 3
3 Development Kit Setup
UG-20105 | 2017.12.18
Intel
®
Cyclone
®
10 GX FPGA Development Kit User Guide
11