EasyManuals Logo

Intel I3-530 User Manual

Intel I3-530
51 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #40 background imageLoading...
Page #40 background image
40
Specification Update
AAU76. PMIs during Core C6 Transitions May Cause the System to Hang
Problem: If a performance monitoring counter overflows and causes a PMI (Performance
Monitoring Interrupt) at the same time that the core enters C6, then this may cause
the system to hang.
Implication: Due to this erratum, the processor may hang when a PMI coincides with core C6 entry.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Tables of Changes.
AAU77. 2MB Page Split Lock Accesses Combined With Complex Internal
Events May Cause Unpredictable System Behavior
Problem: A 2MB Page Split Lock (a locked access that spans two 2MB large pages) coincident
with additional requests that have particular address relationships in combination with
a timing sensitive sequence of complex internal conditions may cause unpredictable
system behavior.
Implication: This erratum may cause unpredictable system behavior. Intel has not observed this
erratum with any commercially available software.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.
AAU78. If the APIC timer Divide Configuration Register (Offset 03E0H) is
written at the same time that the APIC timer Current Count Register
(Offset 0390H) reads 1H, it is possible that the APIC timer will deliver
two interrupts.
Problem: If the APIC timer Divide Configuration Register (Offset 03E0H) is written at the same
time that the APIC timer Current Count Register (Offset 0390H) reads 1H, it is possible
that the APIC timer will deliver two interrupts.
Implication: Due to this erratum, two interrupts may unexpectedly be generated by an APIC timer
event.
Workaround: Software should reprogram the Divide Configuration Register only when the APIC timer
interrupt is disarmed.
Status: For the steppings affected, see the Summary Tables of Changes.
AAU79. TXT.PUBLIC.KEY is Not Reliable
Problem: On Intel
®
TXT (Intel
®
Trusted Execution Technology) capable processors, the
TXT.PUBLIC.KEY value (Intel TXT registers FED3_0400H to FED3_041FH) is not
reliable.
Implication: Due to this erratum, the TXT.PUBLIC.KEY value should not be relied on or used for
retrieving the hash of the TXT public key for the platform.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Intel I3-530 and is the answer not in the manual?

Intel I3-530 Specifications

General IconGeneral
Processor Numberi3-530
Number of Cores2
Number of Threads4
Base Frequency2.93 GHz
TDP73 W
SocketLGA 1156
Product LineIntel Core i3
Code NameClarkdale
SegmentDesktop
Lithography32 nm
Bus Speed2.5 GT/s DMI
Max Memory Size16 GB
Memory TypesDDR3 1066/1333
Max # of Memory Channels2
Processor GraphicsIntel HD Graphics
Graphics Base Frequency733 MHz
PCI Express Revision2.0
PCI Express Configurations1x16
PCI Express Lanes16
Instruction Set64-bit
Instruction Set ExtensionsSSE4.2
Embedded Options AvailableNo
Max CPU Configuration1
Cache4 MB Intel Smart Cache

Related product manuals