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General| Product Line | 2nd Generation Intel Core Processor Family |
|---|---|
| Category | Mobile |
| Document | Datasheet Volume 1 |
| Release Date | 01-2011 |
| Manufacturer | Intel |
| Document Type | Datasheet |
Details on execution cores, cache hierarchy, and core count.
Overview of supported interfaces like memory, PCI Express, DMI, and graphics.
Features for managing processor core, system, memory, and PCIe power states.
Features for monitoring and managing processor temperature and thermal limits.
Details on DDR3 memory support, timing, and organization modes.
Architecture, configuration, lane connection, and capabilities of the PCI Express interface.
Features and compatibility of the DMI interface connecting processor and PCH.
Architecture of 3D, video, and 2D engines, including pipeline stages.
Support for VT-x and VT-d, enabling virtualization for enhanced performance and security.
Platform enhancements for creating trusted platforms and secure environments.
Feature allowing opportunistic processor frequency increase for enhanced performance.
Overview of system, processor core, package, PCIe, DMI, and graphics adapter states.
Details on Enhanced Intel SpeedStep, low-power idle states, and core C-states.
Understanding TDP limits and maximum junction temperature specifications for thermal solutions.
Features like Adaptive Thermal Monitor, Digital Thermal Sensor, and PROCHOT# for temperature control.
Signal names, descriptions, and buffer types for memory channels A and B.
Signals related to the PCI Express interface, including compensation and transmit/receive pairs.
Signals for catastrophic errors, processor hot status, and thermal trip mechanisms.
Power supply pins for core, I/O, memory controller, PLL, and system agent.
Overview of power distribution pins and connection guidelines.
How the processor communicates voltage requests to the voltage regulator.
Detailed DC electrical parameters for various interfaces and signal groups.
Alphabetical listing of pins for rPGA988B, BGA1224, and BGA1023 packages.
Mechanical drawings and dimensions for different processor packages (rPGA, BGA).
Mapping of logical DDR data pins to physical pins for better performance and debug.
Mapping of logical DDR data pins to physical pins for better performance and debug.
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