Introduction
14 Datasheet, Volume 1
• Up to 32 simultaneous open pages, 16 per channel (assuming 4 Ranks of 8 Bank
Devices)
• Memory organizations
— Single-channel modes
— Dual-channel modes - Intel
®
Flex Memory Technology:
- Dual-channel symmetric (Interleaved)
• Command launch modes of 1n/2n
• On-Die Termination (ODT)
• Asynchronous ODT
•Intel
®
Fast Memory Access (Intel
®
FMA)
— Just-in-Time Command Scheduling
—Command Overlap
— Out-of-Order Scheduling
1.2.2 PCI Express*
• The PCI Express* port(s) are fully-compliant to the PCI Express Base Specification,
Revision 2.0.
• Processor with mobile PCH supported configurations
• The port may negotiate down to narrower widths
— Support for x16/x8/x4/x1 widths for a single PCI Express mode
• 2.5 GT/s and 5.0 GT/s PCI Express* frequencies are supported
• Gen1 Raw bit-rate on the data pins of 2.5 GT/s, resulting in a real bandwidth per
pair of 250 MB/s given the 8b/10b encoding used to transmit data across this
interface. This also does not account for packet overhead and link maintenance.
• Maximum theoretical bandwidth on the interface of 4 GB/s in each direction
simultaneously, for an aggregate of 8 GB/s when x16 Gen 1
• Gen 2 Raw bit-rate on the data pins of 5.0 GT/s, resulting in a real bandwidth per
pair of 500 MB/s given the 8b/10b encoding used to transmit data across this
interface. This also does not account for packet overhead and link maintenance.
• Maximum theoretical bandwidth on the interface of 8 GB/s in each direction
simultaneously, for an aggregate of 16 GB/s when x16 Gen 2
• Hierarchical PCI-compliant configuration mechanism for downstream devices
• Traditional PCI style traffic (asynchronous snooped, PCI ordering)
Table 1-1. PCIe Supported Configurations in Mobile Products
Configuration Mobile
1x8
2x4
GFX,
I/O
2x8
GFX,
I/O
1x16
GFX,
I/O
Intel
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