Datasheet, Volume 1 87
Electrical Specifications
7 Electrical Specifications
7.1 Power and Ground Pins
The processor has V
CC
, V
CCIO
, V
DDQ,
V
CCPLL,
V
CCSA
, V
AXG
and V
SS
(ground) inputs for
on-chip power distribution. All power pins must be connected to their respective
processor power planes, while all VSS pins must be connected to the system ground
plane. Use of multiple power and ground planes is recommended to reduce I*R drop.
The VCC pins and VAXG pins must be supplied with the voltage determined by the
processor Serial Voltage IDentification (SVID) interface. Table 7-1 specifies the voltage
level for the various VIDs.
7.2 Decoupling Guidelines
Due to its large number of transistors and high internal clock speeds, the processor is
capable of generating large current swings between low- and full-power states. To keep
voltages within specification, output decoupling must be properly designed.
Caution: Design the board to ensure that the voltage provided to the processor remains within
the specifications listed in
Ta b l e 7-3. Failure to do so can result in timing violations or
reduced lifetime of the processor.
7.2.1 Voltage Rail Decoupling
The voltage regulator solution must:
• provide sufficient decoupling to compensate for large current swings generated
during different power mode transitions.
• provide low parasitic resistance from the regulator to the socket.
• meet voltage and current specifications as defined in Tab l e 7-3.
7.2.2 PLL Power Supply
An on-die PLL filter solution is implemented on the processor. .
Intel
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