Electrical Specifications
98 Datasheet, Volume 1
Notes:
1. Unless otherwise noted, all specifications in this table are based on post-silicon estimates and simulations
or empirical data.
2. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at
manufacturing and cannot be altered. Individual maximum VID values are calibrated during manufacturing
such that two processors at the same frequency may have different settings within the VID range. Note
that this differs from the VID employed by the processor during a power or thermal management event
(Intel Adaptive Thermal Monitor, Enhanced Intel SpeedStep Technology, or Low Power States).
3. The voltage specification requirements are measured across VCC_SENSE and VSS_SENSE lands at the
socket with a 100-MHz bandwidth oscilloscope, 1.5 pF maximum probe capacitance, and 1-M minimum
impedance. The maximum length of ground wire on the probe should be less than 5 mm. Ensure external
noise from the system is not coupled into the oscilloscope probe.
4. Processor core VR to be designed to electrically support this current.
5. Processor core VR to be designed to thermally support this current indefinitely.
6. This specification assumes that Intel Turbo Boost Technology is enabled.
7. Long term reliability cannot be assured if tolerance, ripple, and core noise parameters are violated.
8. Long term reliability cannot be assured in conditions above or below Max/Min functional limits.
9. PSx refers to the voltage regulator power state as set by the SVID protocol.
10. Idle power specification is measured under temperature condition of 35
o
C.
Note: Long term reliability cannot be assured in conditions above or below Max/Min functional limits.
SLOPE
LL
Processor Loadline
XE
SV-QC
SV-DC
LV
ULV
—
-1.9
-1.9
-1.9
-2.9
-2.9
—mΩ
Table 7-5. Processor Core (VCC) Active and Idle Mode DC Voltage and Current
Specifications (Sheet 2 of 2)
Symbol Parameter Segment Min Typ Max Unit Note
Table 7-6. Processor Uncore (V
CCIO
) Supply DC Voltage and Current Specifications
Symbol Parameter Min Typ Max Unit Note
V
CCIO
Voltage for the memory controller
and shared cache defined at the
motherboard V
CCIO_SENSE
and
V
SS_SENSE_VCCIO
—1.05— V
TOL
CCIO
V
CCIO
Tolerance defined across
V
CCIO_SENSE
and V
SS_SENSE_VCCIO
DC: ±2% including ripple
AC: ±3%
%
I
CCMAX_VCCIO
Max Current for V
CCIO
Rail — — 8.5 A
I
CCTDC_VCCIO
Thermal Design Current (TDC) for
V
CCIO
Rail
——8.5A
Intel
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