Datasheet, Volume 1 45
Power Management
4 Power Management
This chapter provides information on the following power management topics:
•ACPI States
• Processor Core
• Integrated Memory Controller (IMC)
• PCI Express*
• Direct Media Interface (DMI)
• Processor Graphics Controller
4.1 ACPI States Supported
The ACPI states supported by the processor are described in this section.
4.1.1 System States
4.1.2 Processor Core/Package Idle States
Table 4-1. System States
State Description
G0/S0 Full On
G1/S3-Cold Suspend-to-RAM (STR). Context saved to memory (S3-Hot is not supported by the processor).
G1/S4 Suspend-to-Disk (STD). All power lost (except wakeup on PCH).
G2/S5 Soft off. All power lost (except wakeup on PCH). Total reboot.
G3 Mechanical off. All power (AC and battery) removed from system.
Table 4-2. Processor Core/Package State Support
State Description
C0 Active mode, processor executing code.
C1 AutoHALT state.
C1E AutoHALT state with lowest frequency and voltage operating point.
C3
Execution cores in C3 flush their L1 instruction cache, L1 data cache, and L2 cache to the L3
shared cache. Clocks are shut off to each core.
C6 Execution cores in this state save their architectural state before removing core voltage.
C7
Execution cores in this state behave similarly to the C6 state. If all execution cores request C7,
L3 cache ways are flushed until it is cleared.
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