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Intel P4000 - 11-2010 SPECIFICATION - Page 12

Intel P4000 - 11-2010 SPECIFICATION
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Summary Tables of Changes
12
Specification Update
AAZ87 X X No Fix
FP Data Operand Pointer May Be Incorrectly Calculated After an
FP Access Which Wraps a 4-Gbyte Boundary in Code That Uses
32-Bit Address Size in 64-bit ModeFP Data Operand Pointer May
Be Incorrectly Calculated After an FP Access Which Wraps a 4-
Gbyte Boundary in Code That Uses 32-Bit Address Size in 64-bit
Mode
AAZ88 X X No Fix PCI Express Cards May Not Train to x16 Link Width
AAZ89 X X No Fix
The APIC Timer Current Count Register May Prematurely Read
0x0 While the Timer Is Still Running
AAZ90 X X No Fix IO_SMI Indication in SMRAM State Save Area May Be Lost
AAZ91 X X No Fix
FSW May Be Corrupted If an x87 Store Instruction Causes a
Page Fault in VMX Non-Root Operation
AAZ92 X X No Fix CKE May go Low Within tRFC(min) After a PD Exit
AAZ93 X X No Fix
Under Certain Low Temperature Conditions, Some Uncore
Performance Monitoring Events May Report Incorrect Results
AAZ94 X X No Fix
VM Entry to 64-Bit Mode May Fail if Bits 48 And 47 of Guest RIP
Are Different
AAZ95 X X No Fix VM Entry Loading an Unusable SS Might Not Set SS.B to 1
AAZ96 X X No Fix
Accesses to a VMCS May Not Operate Correctly If CR0.CD is Set
on Any Logical Processor of a Core
AAZ97 X X No Fix
Performance Monitor Events for Hardware Prefetches Which
Miss The L1 Data Cache May be Over Counted
AAZ98 X No Fix
Correctable and Uncorrectable Cache Errors May be Reported
Until the First Core C6 Transition
AAZ99 X X No Fix
VM Exit May Incorrectly Clear IA32_PERF_GLOBAL_CTRL
[34:32]
AAZ100 X No Fix
DTSTemperature Data May Be Incorrect On a Return From the
Package C6Low Power State
AAZ101 X X No Fix
USB Devices May Not Function Properly With Integrated
Graphics While Running Targeted Stress Graphics Workloads
With Non-Matching Memory Configurations
AAZ102 X X No Fix
VM Entry May Omit Consistency Checks Related to Bit 14 (BS)
of the Pending Debug Exception Field in Guest-State Area of the
VMCS
AAZ103 X No Fix
Intel Turbo Boost Technology Ratio Changes May Cause
Unpredictable System Behavior
Errata (Sheet 5 of 5)
Number
Steppings
Status ERRATA
C-2 K-0

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