1-34 (No.49834)
6.2 AK7740VT (IC101) : Audio DSP with AD/DA converter
• Pin layout
• Block diagram
AINL3
AINR2
AINL2
AINR1
AINL1
VREFH
AVDD
AVSS
DVSS
DVDD
XTI
XTO
36
35
34
33
32
31
30
29
28
27
26
25
AOUTL2
AOUTR2
BVSS
DVSS
DVDD
INT_RESET
S_RESET
RQ
SCLK
SI
SO
RDY
1
2
3
4
5
6
7
8
9
10
11
12
CLKO
JX
SMODE
LRCLK
BITCLK
SDIN
SDINA
SDOUTA
SDOUT
DRDY
DVSS
DVDD
48
47
46
45
44
43
42
41
40
39
38
37
AINR3
AINL4
AINR4
AINL+
AINL-
AINR+
AINR-
AVSS
VCOM
AVDD
AOUTL1
AOUTR1
13
14
15
16
17
18
19
20
21
22
23
24
48 pin LQFP
(TOP VIEW)
Note) JX , SDIN and SDINA are Pull-down pins
OUTAE
SW3
SW0
SDATA
SW2
SDATA AOUTL
VREFF
AINL-
AINL-
AOUTR
SDOUTA
SDINA
SDINA
SDIN
RQ
SI
SO
SCLK
RDY
DRDY
JX
SDIN
ISEL[2:0]
SDOUTD1
SDOUTD1
SDOUT
SDOUT
DSP
72kbit DLRAM
DAC1
RQ
SI
SO
SCLK
RDY
DRDY
JX
CONTROLLER
ADC
SW2
SW1
C
Q
A
B
SDATA
AOUTL
AOUTR
AOUTL1
VCOM
VREFF
AOUTR1
AOUTL2
AOUTR2
DAC2
*SW1,SW2,SW3,ISEL[2:0],
OUTAE control register
INT_RESET
INT_RESET
SMODEXTOXTICLKOUTBITCLKLRCLK
SMODEXTOXTICLKOUTBITCLKLRCLK
S_RESETS_RESET
AINL+
AINL+
AINL1
AINL2
AINL3
AINL4
AINR1
AINR2
AINR3
AINR4
AINR-
AINR-
AINR+
AINR+
Note)
When C is "L" (0) then A connects with Q
w
w
w
.
x
i
a
o
y
u
1
6
3
.
c
o
m
Q
Q
3
7
6
3
1
5
1
5
0
9
9
2
8
9
4
2
9
8
T
E
L
1
3
9
4
2
2
9
6
5
1
3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com
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