JVC UX-A52R Service Manual

1-43
UX-A52R
1. Pin layout
2. Block Diagram
LA72723 (IC3) : RDS demodulation
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VREF
MPXIN
Vdda
Vssa
FLOUT
CIN
TES
XOUT
RDS-ID/READY
RDCL
RDDA
RST
MODE
Vddd
Vssd
XIN
REFERENCE
VOLTAGE
ANTI ALIASING
FILTER
SMOOTHING
FILTER
CLOCK
RECOVERY
(1187.5Hz)
DATA
DECODER
RAM
(128-bits)
RDS-ID
DETECT
57kHz
BPF
(SCF)
+
-
Vddd
Vdda
Vssa
MPXIN
Vssd
RDDA
RDCL
MODE
RST
RDS-ID/
READY
CLK(4.332MHz)
OSC
XIN
XOUT
TEST
TEST
FLOUT
VREF
VREF
CIN
PLL
(57kHz)
+5V
+5V
3. Pin functions
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin
No.
Symbol
Function
VREF
MPXIN
Vdda
Vssa
FLOUT
CIN
TEST
XOUT
XIN
Vssd
Vddd
MODE
RST
RDDA
RDCL
RDS-ID
READY
I/O
O
O
O
O
O
I
I
I
I
I
I
I/O
Reference voltage output (Vdda/2)
Baseband (multiplexed) signal input
Analog power supply (+5V)
Analog ground
Subcarrier input (comparator input)
Subcarrier input (filter output)
Test input
Crystal oscillator input (exeternal reference input)
Crystal oscillator output (4.332MHz)
Digtal ground
Digtal power supply
Read mode setting (0:master,1:slave)
RDS-ID/RAM reset (positive polarity)
RDS data output
RDS clock output (master mode)/RDS clock input (slave mode)
RDS-ID/READY output (negative polarity)

JVC UX-A52R Specifications

General

Brand	JVC
Model	UX-A52R
Category	Stereo System
Language	English