Korg RK-100 User Manual

Functional
Description
of Terminals
Terminal Code
Name
I/O
Function
INo
-
IN7
Analog
signals
1
These are the input
terminals
for analog signals. ADD A
—
ADD C
determine
which of the
8
inputs
will
be
selected. The
analog
voltage applied
to
these terminals is
converted
to a
digital
value
then output at
terminals
2“^
to2“*.
ADD
A- ADD
C
Address signals
1
These are
the input terminals that select a
terminal among
IN,, to
INt.
The address input of ADD A to ADD B
is read to
the address
latch
at
the rising edge of ALE.
ALE
Address
Latch Enable
signal The strobe
signal for reading the address
signals input to ADD
A
through ADD
C
into the
internal address
latch.
REF
(+)
Reference voltage
(+)
1
The reference voltage
input terminal. The voltages
of the
(REF(+)
voltage >
REF
(-)
voltage)
REF
(-)
terminal and this
terminal
cause
voltage to be
applied to the
internal 256R
ladder
circuit.
REF
(-)
Reference
voltage
{—
)
1
The reference voltage
input terminal. The
voltages
of the (REF
{+)
voltage >
REF
(—
)
voltage)
REF
(+)
terminal and
this terminal
cause
voltage
to
be applied to the
internal 256R
ladder circuit.
OE
Output
Enable signal
1
The control
terminal for the digital data output
terminal.
When
OE is "L”, the
terminals
2“^
to
2“^
assume a
floating status;
when "H",
digital data is output.
Digital signal
0
The analog
signals input to
INo
to
INi
are converted to
digital
data
then output at these
terminals. When OE is "L",
these
terminals assume a floating
status; when "H",
valid data is output.
2“‘
is the MSB and
2“®
is
the LSB.
EOC
Convert
End signal 0
This
terminal
indicates the end
of A-0
conversion. It is reset ("H”
^
"L") by
the
START signal, and is set ("L”
-
"H”) by
the
end
of conversion.
EOC is normally used as
the interrupt
signal
to
the
CPU.
START
Convert Start
signal This
terminal
signals the start
of conversion. When rising
from
"
L"
to "H", the
internal registers are
reset
by
successive
approximation.
Conversion starts at the
falling of "H” to "L".
CLK
Clock input
ID
This is the clock
input
terminal that is
the
basis
for internal timing.
(4)
Input
section
Key data
goes through a
41 diode
matrix circuit,
and
through
IC5
(14050)
and ICl (HC240)
before
reaching the
CPU. Likewise,
PROGRAM NO.,
OCT
DESTINATION,
and
PROGRAM
DOWN
UP data
reach the CPU
via HC240
(buffer amp).
(5)
Display
Data
from
the CPU goes
through IC2 (LSI
38)
and IC3
(LS138) to
operate
display of
PROGRAM NO. (red)
and
BANK (green).
IC2,
3, 8,
10,
(TC40H138)
are a
line decoder
performing
selection
of
one of
8
outputs
YO—Y7 using
binary inputs
DA,
DB, DC.
Selection
is
inhibited
when E3 pin-5
is at high
level,
and all
outputs
are up
to high
level.
(6)
MIDI
data
output
The output
signal
from CPU
port
1
(P24)
goes
through
IC11
HC004
(inverter
buffer)
and
01
2SC2785
for inver-
sion,
becoming the MIDI
OUT
signal.
(7)
Power
supply
While
a
3-terminals
regulator set
in
a
normal
stabilized volt-
age
circuit is
operated by
2-3
volts
difference
of input
voltage,
the
regulator in RK-100
can
be operated by
only
0.1
volt
difference of
input
voltage for
effective use of
batteries.
This
produces a
stable
+5V
power
supply voltage whether
using
the external AC
adaptor
or
internal vatteries (1.5V
X
6).
If Input
voltage
drops
from 9V to 6V,
this circuits
produces
a
battery down
indication via
the
1C1 (2903)
comparator
which detects
the voltage
drop and
sends a signal to
activate
the
1C1 (2903)
multivibrator
circuit into
oscillation.
This
oscillator
signal
goes
through
IC2
LSI38
and
IC3
LS138to
illuminate
the LED
display.

Korg RK-100 Specifications

General

Brand	Korg
Model	RK-100
Category	Electronic Keyboard
Language	English