LG 32LD330 - Block Diagram

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All right reserved.
Only for training and service purposes
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BLOCK DIAGRAM
RGB-PC
(JK202)
T
U
N
E
R
(
T
U
5
0
0
)
COMPONENT / AV1
(JK101)
AV2
(JK201)
AV_LIN/RIN : 500mVrms
SPK_L
SPK_R
COMPONENT_L/R : 500mVrms
AV_VIN : 1Vpp
NTP3100L
COMP_Y/Pb/Pr
IR & LED (P201)
HDMI_DATA0
TU_MAIN
COMPONENT_Y/Pb/Pr : 1/0.7Vpp
AV_VIN COMP_LIN/RIN
L_CH
R_CH
AV_LIN/RIN
PC-SOUND
(JK203)
I2S_MCLK I2S_SDO I2S_WS I2S_SCK
TMDS
LIPS
RL_ON/IDISP_EN
PANEL_STATUS
E-DIM
OPC_OUT
EEPROM
(24LC256)
Serial Flas h
(MX25L64)
EEPROM
HDCP
(24WC08)
EEP_SCL/SDA
EEP_SCL/SDA
TXCE2±± TXCE3±±
TXCLKE±±
TXCE1±± TXCE0±±
TXCO1±± TXCO3±± TXCO2±± TXCO0±±
TXCLKO±±
M_SCL/SDA
MAIN SCLAER
Matrix
(HD:LGE4765A)
(FHD:LGE4767A)
(IC800)
EEPROM
24C02
IC302
TU500
IC802 IC803 IC801
IC600
P402 P403
M_SCL/SDA
SIDE
REAR
HDMI3
(JK303)
USB
(JK204)
RS-232C
(JK200)
USB(SVC)
(JK205)
HDMI1
(JK301)
HDMI2
(JK302)
EEPROM
24C02
IC301
EEPROM
24C02
IC300
DDC_SCL1/SDA1
DDC_SCL2/SDA2 DDC_SCL3/SDA3
Contr oller
ST3232CDR
IC200
RXD/TXD
EEPROM
24C02
IC201
DSUB_SCL/SDA
P401
SPI_CZ/DO
SPI_CLK/DI
HDMI_DATA1 HDMI_DATA2
USB DN/DP PC_R/G/B PC_VS/HS TXD/RXD PC_AUD_L/R
TXCO4±±
TXCE4±±
FHD LVDS con nector
HD LVDS conn ector
DDR2 SDRAM
(512M Byte)
IC900
DDR2_CKE
DDR2_WEZ
DDR2_DQS0 ±±
DDR2_MCLK
DDR2_BA0/1
DDR2_DQS1±±
DDR2_ODT
DDR2_DQM0/1
SIDE_VIN SIDE_LIN/RIN