LG 42PG20 - Page 81

81
Plasma Fall 2008 42PG20
Diagram of Z Sustain Section on the Board
Z SUS Section( on Y
Z SUS Section( on Y
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SUS Board) Block Diagram
SUS Board) Block Diagram
Circuits generate erase,
sustain waveforms
Generates Z Bias 100V
Distributes Logic Signals
M5V, VA, VS
FET Makes Drive waveform
Display Panel
Via FPC
(flexible printed circuit )
Control Board
Y-SUS Board
Z-SUS FETs
Via P801 to P1
NO IPMs
Z-SUS PWB
Z-SUS Section of the Y-SUS
PWB Receives
VS, VA, M5V