LG 50PC1D - Block Diagram

- 26 -
BLOCK DIAGRAM
Comp
(DVD/DTV)
Rx0/1,Tx0/1
IR/TX
SCL/SDA
H/V(RGB)
SCL/SDA
Rx0/1/2/C•
ICL3232C 24LC02BT
74HC14D
24LC02BT
Hudson
( Sub CH.
Decoding /
2D Comb /
2D De-int. /
Scaling )
CXA2069Q
A/V Switch
Tuner
TU_Main
Sil9012
TMDS Rx
(HDCP)
RGB_PC/DTV
RGB H/V
RGB H/V
Cortez
( Main CH.
Decoding /
3D Comb /
3D De-int. /
Scaling & FRC /
PIP Mux. /
GUI /
VSB Decoding /
Audio Delay /
CPU )
I
2
C
RS232_Rx/Tx_Cortez
Side-AV B D
AV
S-AV
YCin5
HY5DU281622E
DDRRAM (128MB X2)
AM29LV
F-ROM (2MB)
PC_Audio LR
SIF
AM_Audio
AVin5
MSP4410K
Audio SW &
Tone Control
NSP2100A
PWM Mod .
TAS5112
Digital Amp
LRCK/LRCH SCK
R_SPK_out
AV_LR
PC_Audio LR
AM_Audio, SIF
I
2
S
Comp
Scart_RGB / FB
Comp_L/R
AVin2 (YC/CVBS/L/R/Scart_ID)
AVin4(CVBS/L/R)
YCin4
V or Y / C (Main)
L_CH
R_CH
DTV_LRout
LVDS_31P
/
Tx0/1/2/3/C• Disp_En SCL /SDA
V_out1 Y_in1
V or Y / C (Sub)
/
L_SPK_out
I
2
S
I
2
S
I
2
C
For DDC_RGB
For DDC_HDMI
I
2
C
RGB
(PC/DTV)
HDMI
(PC/DTV)
RS232
R/C OUT
Scart1
Scart2
DTV OUT
AV
S-AV
PC_Audio
TV_out (CVBS/L/R)
AVin1 (CVBS/L/R/Scart_ID)
DTV_out (CVBS/L/R)
CI SLOT
STi5100
Tuner
4M BYTE
FRESH
MEMORY
HY5DU561622D
DDRRAM (256MB)
T.S 7 , SYNC,CK,VALID
74LVC541
74LVC
541
74LVC
245
CVBS
27MHZ
CRYSTAL
YCbCr 656 Format _8bit
DIGITAL
ANALOG
/
Spliter
SN74
LVTH541
I
2
C
URAT_DATA_IN/OUT
IN
OUT
Wired-or 8bit
I
2
C
I
2
C
MNT_out (CVBS/L/R) ,SOUND MUTE
I
2
S (HDMI Sound) 3bit
TV_LRout
CVBS
SN74
LVTH541
/
I
2
S , 27M CLK _4bit
SPDIF OUT
SPDIF_out
SPDIF_out_A
/
/
HDMI_Data
24bit_A
H/V SYNC,CLK,DE 4bit
HDMI_Data
24bit_B
H/V SYNC,CLK, DE
4bit
EPF_R/L
RS232_Rx/Tx_Hud
74LCX157
RS232_Rx/Tx_STi
RS232_Rx/Tx_STi
Comp
24bit_A
24bit_B
I
2
S (DTV Sound) 3bit
27M CLK
DTV_LRout
TV_LRout
Comp (Y/Pb/Pr)
Comp_L/R
L_CH
R_CH
Variable_L/R
Variable_L/R
74LCX157
SPDIF_out_B
SPDIF_out_B
SPDIF_out_A
R/C IN
74LVC541
All manuals and user guides at all-guides.com
all-guides.com