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LG GS290 - Baseband Processor (BBP) Introduction

LG GS290
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- 18 -
LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. TECHNICAL BRIEF
GS290 Operational Description Revision B
LG Electronics 20/136 LGE Property
3.2. Baseband Processor (BBP) Introduction
Figure 2 Top level block diagram of the S-GOLD3
TM
(PMB8877)
CONFIDENTIAL
S-GOLD3 Baseband IC
PMB 8877
S-GOLD3 Overview
S-GOLD3 Product Specification 7 Version 3.0, 2005-05-31
2 S-GOLD3 Overview
2.1 Introduction
S-GOLD3
TM
is a GSM/EDGE single chip mixed signal baseband IC containing all analog and digital functionality
of a cellular radio. Additionally S-GOLD3
TM
provides multimedia extensions to enable todays and future feature
phone applications. It is designed as a single chip solution, integrating the digital and mixed signal portions of the
base band in a 1.35V 90nm CMOS technology to meet the ever increasing demands of the GSM/EDGE cellular
subscriber market for feature rich and high performance terminals at low costs.
The Infineon Technologies DSP firmware and software modules for FR, HR, EFR and AMR-NB vocoding and
channel encoding allow short time to market. Additionally, the S-GOLD3
TM
supports multislot operation modes
HSCSD (up to class 10), GPRS for high speed data applications (up to class 12) and EGPRS (up to class 12)
without additional external hardware.
The processing within S-GOLD3
TM
is handled by an ARM926EJ-S CPU and a TEAKLite® DSP core.
The ARM926EJ-S is a powerful standard controller and particularly suited for wireless systems. It is supported by
a wide range of tools and application SW.
The TEAKLite® is an established DSP core for wireless applications with approved firmware for GSM/EDGE
signal processing.
2.2 Example of Infineon S-GOLD3
TM
Quad-Band E-GPRS Solution
Figure 2-1 E-GPRS Solution
In combination with Infineon Technologies SMARTi familiy RF ICs and an S/M-Power battery and power
management IC a complete 3 chip system solution is achieved, which results in extremely compact
implementation, very low power consumption and cost effective system performance.
A wide choice of communication interfaces allows complex data and multimedia system designs. Due to its flexible
interfaces S-GOLD3
TM
can be set up easily to control a wide variety of RF architectures.
SMARTiPM
PMB 6272
(ED GE GSM/GPR S RF Tran sce ive r)
TEAKLite®
GEA-1/2/3
SRAM
USB FS
OTG
DMA C
GPIOs
USIM
GPTU
RTC
Equalizer
Acc.
I²S / DAI
GSM
Timer
Keypad
AFC
CAPCOM
IC U
SPCU
AUX
ADC
SRC
MEM
CTRL
SDIO IF
I²C
CGU
Display
IF
Camera
IF
FCDP
Multimedia IC IF
ARM® 926 EJ-S
MOVE CoPro
Fast
IrDA
USIFs
Crypto
box
TSMU
I²S
Sys
Timer
1 Wire
Engine
2D
MMC IF
Channel
Decoder
BB Receiver
Modulator
8 PSK/GMSK
JTAG
CerberusABW
S-GOLD3
PMB 8877
IR-Memory
DAC
ADC
Audio FE
DAC
DSP
Timer
DSP
ICU
DSP
ICU
ADC
I/Q
DA C
Ph/
Am p
SD
PLL
IF
AD C
3 WI R E
IF
RF
Control IF
GSM
Cipher Unit
3-wire-bus
Analog
Audio In
Analog
Audio Out
SDs
SM-Power3
PMB 6821
USB
AU D IO
AMPLIFIER
BA C KLIGHT
I²C
DIGITAL
CONTR OL
CH A RGER
DIG. RESET
& SLEEP
CONTR OL
VRFsVAU D IOs
VMMCVUSB
VSIMVRTC
VVIBVAU X
VAFC
SU
VIOVPLL
REFERENC E
PA
FEM
DC XO
Core supply (0.95V,1.37V)
Analog Supply(2.5V)
VRTC, VPLL, IO Supply
1.8V, 2.5V
LD Os
FLA SH
LIGHT
SD R or D D R
SD-R A M
/ C -R AM
N OR / N A ND
FLA SH
1 32
4 65
7 98
* #0
SIM
MMC
GS290 Operational Description Revision B
LG Electronics 20/136 LGE Property
3.2. Baseband Processor (BBP) Introduction
Figure 2 Top level block diagram of the S-GOLD3
TM
(PMB8877)

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