LG LG-P970 - Page 207

- 207 -
Copyright © 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
7. CIRCUIT DIAGRAM
C228
220n
C227
100n
532R
IND IND
432R
CN201
1615
1714
1813
1912
2011
2110
229
238
247
256
265
274
283
292
301
822R
IND
IND
632R
IND
332R
922R
C242
DNI
C241
DNI
C237
220n
C217
10u
C218
10u
C224 0.1u
C225 0.1u
C226 0.1u
K01
622R
)3060(
C210
10u
10u
C205
18p
C239
C203
220n
0032R
10n
C201
C216
0.1u
132R 0
(0603)
R222
10K
522R
K01 )3060(
422R
)3060(K01
0.1uC223
4.7u
C222
C235 0.1u
0.1uC234
202R K7.4
IND
402R
Q201
43
52
61
S1 D1
G1 G2
D2 S2
K2
2
2
3
2
R
IND
802R
K7.4302R
K7.4702R K7.4012R
IND
902R
102R
IND
K001 022R
72
2
R
3
4
U202
B6
B3
B4
A4
A7
A3
A6
M8
L7
M7
N5
N4
M4
N3
N2
L8
M6
L6
N7
L5
M3
M2
M1
H7
D5
H8
D7
J1
G2
F2
H2
D3
F8
G8
B7
B8
C7
C8
C6
D8
C5
E6
J5
J7
K8
J8
K7
K6
K5
K4
J2
H3
E1
E2
J3
C4
D2
C3
D1
C2
B2
K3
K2
K1
J4
N9
N6
M10
L9
L2
K10
J10
H9
H1
G9
F10
E9
D10
C9
B10
B5
B1
A9
M5
A5
L4
L3
J6
H6
H5
H4
G7
G6
G5
G4
G3
F7
F6
F5
F4
F3
F1
E8
E7
E5
E4
E3
D6
D4
A2
M9
L10
K9
J9
H10
F9
E10
D9
C10
B9
N8
L1
G10
G1
C1
A8
01N 1N 01A 1A
1CN
62CN 82CN 92CN
VDD1
VDD2
VDD3
VDD5
VDD4
VDD6
VDDQ1
VDDQ6
VDDQ5
VDDQ4
VDDQ10
VDDQ9
VDDQ2
VDDQ8
VDDQ7
VDDQ3
NC27
NC20
NC21
NC9
NC19
NC8
NC11
NC12
NC17
NC18
NC7
NC16
NC25
NC6
NC10
NC5
NC13
NC14
NC4
NC2
NC24
NC22
NC23
NC15
NC3
VCC1
VCC2
VSS1
VSS4
VSS8
VSSQ5
VSSQ4
VSSQ9
VSSQ8
VSSQ3
VSS2
VSS3
VSSQ10
VSSQ1
VSSQ2
VSS5
VSSQ6
VSSQ7
VSS6
VSS7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
BA0
BA1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
/CK
CK
CKE
/CS
/RAS
/CAS
/WED
UDQM
LDQM
UDQS
LDQS
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
IO8
IO9
IO10
IO11
IO12
IO13
IO14
IO15
/CE
/RE
/WE
CLE
ALE
/WP
R/B
u3.
3
10
2
L
100
R212
K7.4
322R
502R K093K022
602R
FC-135
32.768KHz
X201
21
U201
6V 6C 3B 4B 5B 6B 2A 5A 4A 3A 6A 7A 7B 1L 2L 4L 1K 2K 5K 4K 4J 4H 9B 8B 01B 01A 9A 8A 01L 01K 01P 11P 9N 21N 11N 61K 71K 61J 71J 61H 71H 71L 71M 02G 91G 9
F
1E 2E 8E 5
G
9H 01H 01T 01U 5L 9R 7L 8L 11E 21E 21F 01
E
11G 31M 41M 31L 41L 31H 31K 31J 5
1M
51
J
41J 41K
Y7
Y8
Y5
Y6
Y9
Y10
R2
T1
T2
T4
T5
U1
U2
V1
V2
W1
W2
W3
Y2
Y3
H7
H5
H8
J7
J8
J1
J2
H1
H2
M19
M20
M18
M16
L16
L19
L20
K19
J20
J18
H19
J19
K20
U8
U7
U6
U5
U4
W6
W5
W4
Y4
U16
P13
P14
N13
T17
R16
N14
R17
P16
R18
P17
N16
N17
P19
N19
N20
Y16
Y15
W16
W17
W18
Y18
W19
Y19
W20
V19
V20
T19
T20
R19
R20
P20
J6
D1
D2
C1
C2
D4
B1
B2
E5
D5
D6
D7
G4
E4
D8
U11
W14
U14
W13
Y17
U20
W15
U19
T14
T13
U15
U13
U12
V15
T11
T12
R12
P12
T9
V9
P8
P9
D9
D10
C9
W7
W11
W8
W12
W10
N10
W9
V12
M3
J3
H20
P7
G7
R4
F4
D16
D11
T16
T7
L11
K7
E7
B11
H14
R3
F3
U17
T6
K8
E6
R5
F5
T15
T8
K11
E9
C12
B12
A11
A12
D13
02Y 02A
1Y 1A
21Y
11Y
41Y 31Y
4P 8N 1M 2M 4M
5M
7M 8M 1N 2N 4N 5N 6M
7N 1P
2P 1R 5P
71F
51E
91F 31E
71G
61F 51C 41D 61A
51B
51D 41E
61E
61B 81F 61G 21D 9
1E
21H
02F 21G 31G 4
1G
91D 02D 02E
0
2C
02B
71E 7
1D
91C 91B 71A 8
1B
91A
71B 81A
5
1A
11H
2G 1F
31A
41A
31B 41B
2F
01G
8G 1G 5J
9G
9U
N_
2
TE
S
E
R
P
M
C_TESE
R
NE_GRHC TNI_C2I N
E_
P
MC
N
E
_K
L
C_FER
NESYSF
TAD_XR_3iD X
TA
D_
X
R_
3
i
D
T
A
D_
X
T_3iD
XTAD_XT_3iD NE
K
LCSY
S
T
ES
E
RX
N
_
TRELA
FERV
1
_
1D
S
_TAB
V
_
DD
V
2_
1
DS
_T
A
B
V_DDV
1_
1
DS
V
2_1DSV B
F_1DS
1
_
1
D
S_SSV
2_1DS_SSV
1
_
2D
S
_TABV_
D
DV
2_2DS_TABV_DDV 1_2DSV 2_
2
DS
V
BF
_
2D
S
1_2DS_SSV 2_2D
S
_
SS
V
1
F
FO
_N
O
2
F
FO_NO
N_1TESER N_UMP_TESER PMC_NO_RWP
SAEMUMP SDVL_DDV 1ANAV 2ANAV
ANA_SSV
ODL_TABV_DDV 2DSO_DDV
2FRV 1_21FR_TABV_DDV 1FRV
2_21FR_TABV_DDV
21FR_SSV IP
I
MV
CTRV_DDV
LLPV_DDV M
I
S
V_
D
D
V
BSUV_DDV
UMPV_DDV 0D
_
FI
D
1D_FID 2D_FID 3
D_FID
4D_FID
5D_FID 6D_FID
7D_FID 8D_FID 9D_FID 1SC_FID 2SC_FID DC_FID RW_FID
DR_FID
DH_FID DV_FID 1TESER_FID 1PD_ISD
1ND_ISD
PKLC_ISD
NKLC_ISD
9_CN 01_CN 11_CN 21_CN
F26M
F32K
OSC32K
VDD_RTC
VSS_RTC
VDD_CORE_1
VDD_CORE_2
VDD_CORE_3
VDD_CORE_4
VDD_CORE_5
VDD_CORE_6
VDDP_DIG_1
VDDP_DIG_2
VDDP_DIG_3
VDDP_DIG_4
VDDP_DIG_5
VDDP_DIG_6
VDDP_DIG_MS
VSS_MAIN_1
VSS_MAIN_2
VSS_MAIN_3
VSS_MAIN_4
VSS_MAIN_5
VSS_MAIN_6
VSS_MAIN_9
VSS_MAIN_10
VSS_MAIN_11
VSS_MAIN_12
VSS_MAIN_13
VSS_MAIN_14
VSS_MAIN_15
VSS_MAIN_16
VSS_MAIN_17
VSS_MAIN_18
VSS_MAIN_19
VDDP_MMC
MIPI_R_EXT
VDD_MIPI_PLL
VDD_MIPI_BGC
VDD_MIPI_MASTER
VDD_MIPI_SLAVE
VDD_USB
VDD_USB_DIG
VDD_USB_HS_PHY
VDD_FUSE_LS
VDD_FUSE_FS
FWP
FCDP_RBn
MEM_CS0_n
MEM_CS1_n
MEM_CS2_n
MEM_CSA0_n
MEM_ADV_n
MEM_RD_n
MEM_WR_n
MEM_WAIT_n
MEM_RAS_n
MEM_CAS_n
MEM_BC0_n
MEM_BC1_n
MEM_BC2_n
MEM_BC3_n
MEM_SDCLKO
MEM_BFCLKO_0
MEM_BFCLKO_1
MEM_CKE
MMCI2_CMD
MMCI2_CLK
MMCI2_CD
MMCI2_DAT[0]
MMCI2_DAT[1]
MMCI2_DAT[2]
MMCI2_DAT[3]
MMCI3_CMD
MMCI3_CLK
MMCI3_CD
MMCI3_DAT[0]
MMCI3_DAT[1]
MMCI3_DAT[2]
MMCI3_DAT[3]
SWIF_TXRX
MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14
MEM_A15
MEM_AD0
MEM_AD1
MEM_AD2
MEM_AD3
MEM_AD4
MEM_AD5
MEM_AD6
MEM_AD7
MEM_AD8
MEM_AD9
MEM_AD10
MEM_AD11
MEM_AD12
MEM_AD13
MEM_AD14
MEM_AD15
MIPI1_CLK
MIPI1_DATA0
MIPI1_DATA1
MIPI1_DATA2
MIPI1_DATA3
MIPI1_DATA4
MIPI1_DATA5
MIPI1_DATA6
MIPI1_DATA7
VBAT_HF_SPK_1
VBAT_HF_SPK_2
VSS_HF_SPK_1
VSS_HF_SPK_2
HP_SPK1P
HP_SPK1N
HP_SPK2P
HP_SPK2N
VMIC
VUMIC
VDD_CPN
CP1
CP2
I2C1_SCL
I2C1_SDA
I2C2_SCL
I2C2_SDA
I2S1_CLK0
I2S1_WA1
I2S1_RX
I2S1_TX
I2S1_WA0
CIF_D0
CIF_D1
CIF_D2
CIF_D3
CIF_D4
CIF_D5
CIF_D6
CIF_D7
CIF_PCLK
CIF_HSYNC
CIF_VSYNC
CLKOUT2
CIF_PD_GPIO
CIF_RESET_GPIO
CSI_DP1
CSI_DN1
CSI_DP2
CSI_DN2
CSI_CLKP
CSI_CLKN
0M 1M 2M 3
M
4
M
5
M
6M 7M 8M 9M
01M
KLC_C
C
TSR_C
C
OI_
C
C
SUL
PD
S
UNI
MD
ODT I
DT
K
CT
SMT
n
_TSRT
N
I_
GI
RT
1NOM_WH 2NOM
_
WH
1
NI_
O
ID
U
A_PSD
0
T
UOK
L
C
0TU
O
_T
1T
UO
_T
K
23K
L
C
1N
P
E
1PPE
1APPE 2APPE 1PCIM 1NCIM P1XUA N1XUA P2XUA N2XUA
DMC_1ICMM KLC_1ICMM
DC_1ICMM
0_
T
AD
_
1IC
M
M
1_TAD_1ICMM 2_TAD_1ICMM 3_
T
AD
_
1IC
M
M
TSET_BSU
SULPD_BSU
S
U
NI
M
D_BSU
ENUT_BSU
DI_BSU
1
SU
B
V
RSTM_DXT_1FISU
n_STR_1FISU n
_
ST
C
_1
FI
SU
TSRM_DXR_1FISU RSTM_DXT_3FISU TSRM_DXR_3F
I
SU
KLCS_3FISU
n_STR_3FISU n_STC_3FISU
0NI_PK 1NI_PK 2NI_PK 5NI_PK 4NI_PK 3NI_PK 6NI_PK
0TUO_PK 1TUO_PK 2TUO_PK 3TUO_PK
31_CN 41_CN
100n
C204
8
1
2R
K7.4 912R K7.4
C240
18p
0.1u
C229 C230
0.1u
C231
0.1u 0.1u
C232 C233
0.1u
220n
C219
U203
65
74
83
92
101
V+ NO2
NO1 COM2
COM1 IN2
IN1 NC2
NC1 GND
30KR221
C220
22u
C212
0.1u
10K
PT201
1u
C214
0.1u
C236
712R K7.4
220n
C202
C208
1u 220n
C211
220n
C206 C207
1u
0.1u
C215
220n
C213
u3.320
2
L
K01
112R
220n
C238
22u
C221
100n
C209
TP110
TP111
VBAT
VBAT
VBAT
VBAT
VBAT
1.8V_SD
1.8V_SD
1.8V_SD
1.8V_SD
1.8V_SD
1.8V_SD
1.8V_SD
1.8V_SD
1.8V_SD
1.8V_SD
1.8V_SD
TAD_XT_3ID
XTAD_XT_3ID
NE_K
L
C_FER
2.85V_RF1
SYS_CLK
TAD_XR_3ID
NE_KLC_SYS
E
U_N_T
RE
LA
XTAD_XR_3ID
2.85V_RF2
E
U
_
N_TESER
USB_VBUS
UART_RX_IFX
XFI_XR_TRAU
UART_TX_IFX
XFI_XT_TRAU
KL
C
_
MIS
2.85V_SIM
OI_MIS
TSR_MIS
PCM_IFX_OMAP_CLK
PCM_IFX_OMAP_DIN
PCM_IFX_OMAP_DOUT
KLC_CPI_2IPSCM
TUOD_CPI_2IPSCM
NID_CPI_2IPSCM
IPC_MRDY
IPC_SRDY
2.3V_RTC
2.3V_RTC
2.3V_RTC
TESER_XFI
PCM_IFX_OMAP_FSYNC
UART_RX_SW
BT_PCM_DIN
BT_PCM_SYNC
BT_PCM_DOUT
BT_PCM_CLK
IFX_USB_VBUS_EN
1.8V_VIO
1.8V_VIO
UART3_RX_OMAP
UART3_TX_OMAP
JTAG_OMAP_TCK
JTAG_OMAP_TDI
JTAG_OMAP_TMS
JTAG_OMAP_TRST
USIF1_SW
MODEM_PWR_CHK
XFI_MD_BSU
XFI_PD_BSU
JTAG_OMAP_TDO
JTAG_OMAP_RTCK
OMAP_PWR_RESET
MODEM_WAKE
DNES_MEDOM
MODEM_CHK
MODEM_AP_WAKE
DNES_PAMO
UART_TX_SW
NORWP_XFI
UART4_TX_IPC
UART4_RX_IPC
FE
R
_SPG_zH
M6
2
MEM_WP
MEM_WP
MEM_BUSY
MEM_BUSY
MEM_SDLKO
MEM_SDLKO
MEM_BFCLKO1
MEM_BFCLKO1
MEM_CKE
MEM_CKE
MEM_CS0_N
MEM_CS0_N
MEM_RAS_N
MEM_RAS_N
MEM_CAS_N
MEM_CAS_N
MEM_STROBE0
MEM_STROBE0
MEM_STROBE1
MEM_STROBE1
MEM_DQM1
MEM_DQM1
MEM_DQM0
MEM_DQM0
2.5V_ANA2
2.5V_ANA2
MEM_CS1_N
MEM_CS1_N
MEM_A9
MEM_A9
MEM_A10
MEM_A10
MEM_A11
MEM_A11
MEM_A12
MEM_A12
MEM_A13
MEM_A13
MEM_A14
MEM_A14
MEM_A15
MEM_A15
MEM_AD0
MEM_AD0
MEM_AD0
MEM_AD1
MEM_AD1
MEM_AD1
MEM_AD2
MEM_AD2
MEM_AD2
MEM_AD3
MEM_AD3
MEM_AD3
MEM_AD4
MEM_AD4
MEM_AD4
MEM_AD5
MEM_AD5
MEM_AD5
MEM_AD6
MEM_AD6
MEM_AD6
MEM_AD7
MEM_AD7
MEM_AD7
MEM_AD8
MEM_AD8
MEM_AD8
MEM_AD9
MEM_AD9
MEM_AD9
MEM_AD10
MEM_AD10
MEM_AD10
MEM_AD11
MEM_AD11
MEM_AD11
MEM_AD12
MEM_AD12
MEM_AD12
MEM_AD13
MEM_AD13
MEM_AD14
MEM_AD14
MEM_AD14
MEM_AD15
MEM_AD15
MEM_AD15
MEM_A0
MEM_A0
MEM_A1
MEM_A1
MEM_A2
MEM_A2
MEM_A3
MEM_A3
MEM_A4
MEM_A4
MEM_A5
MEM_A5
MEM_A6
MEM_A6
MEM_A7
MEM_A7
MEM_A8
MEM_A8
MEM_WR_N
MEM_WR_N
MEM_WR_N
MEM_RD_N
MEM_RD_N
MEM_ALE_N
MEM_ALE_N
MEM_CLE_N
MEM_CLE_N
TRIG_IN
NI_GIRT
TRIG_IN
TDO
O
D
T
TCK
KCT
TMS
S
MT
TDI
I
DT
IFX_USB_VBUS
SUBV_BSU_XFI
IFX_USB_VBUS
IFX_USB_VBUS
3.1V_USB
3.1V_USB1.2V_MIPI
1.2V_MIPI
RESET1_N
N_1TESER
2NO
M
_
W
H
HW_MON2
1NO
M
_
WH
HW_MON1
TRSTN
N
TSRT
1.35V_PLL
1.35V_PLL
X
F
I_XT_1FIS
U
USIF1_TX_IFX
1
NI_
OI
DUA_PSD
DSP_AUDIO_IN1
1.3V_CORE
1.3V_CORE
USIF1_RX_IFX
XFI_XR_1FISU
DUMMY INTERFACE
(Active high)
NOR boot 0 0 1
1 11
11
0
00
Flashless boot
16-bit NAND boot
TRIG_INHW_MON2HW_MON1
Analog switch for USIF1
BOOT CONFIGURATION
0
DSP_AUDIO_IN1
BASE BAND PROCESSOR(PM9801)
INFINEON MEMORY
%1 ,mho2.34 ylppa ot deen
PMIC