LG LG-P970 - Page 78

3. TECHNICAL BRIEF
- 78 -
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Only for training and service purposes
LGE Internal Use Only
PR
EL
IMINA
RY
mcspi-001
Device
m=[2,3]
MPU SS
Multichannel
SPI1 I/F
SPI1_DMA_RX[0,3]
SPI1_DMA_TX[0,3]
SPI1_SWAKEUP
SPI1_FCLK
SPI1_IRQ
spi1_clk
spi1_simo
spi1_somi
spi1_cs0
spi1_cs1
spi1_cs2
spi1_cs3
Multichannel
SPIm I/F
SPIn_DMA_RX[0,3]
SPIn_DMA_TX[0,3]
SPIn_SWAKEUP
SPIn_FCLK
SPIn_IRQ
spim_clk
spim_simo
spim_somi
spim_cs0
spim_cs1
Multichannel
SPI4 I/F
SPI4_DMA_RX[0]
SPI4_DMA_TX[0]
SPI4_SWAKEUP
SPI4_FCLK
SPI4_IRQ
spi4_clk
spi4_simo
spi4_somi
spi4_cs0
L4 interconnect
INT
System
DMA
PRCM
MPU SS
INT
System DMA
PRCM
MPU SS
INT
System
DMA
PRCM
L4 interconnect
L4 interconnect
TI Confidential — NDA Restrictions
www.ti.com McSPI Overview
Figure 20-1. Multichannel Modules SPI1, SPI2, SPI3, and SPI4
The McSPI instances include the following main features:
• Serial clock with programmable frequency, polarity, and phase for each channel
• Wide selection of SPI word lengths ranging from 4 bits to 32 bits
• Up to four master channels or single channel in slave mode
• Master multichannel mode:
– Full duplex/half duplex
– Transmit-only/receive-only/transmit-and-receive modes
SWPU176A– October 2009 Multichannel SPI 3047
3.12.2.8 McSPI
The multichannel serial port interface is a master/slave synchronous serial bus.