LG MBD-K203Q - Typical System Block Diagram

3-61
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Only for training and service purposes
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2nd-Order L-C
Output Filter
for Each
Half-Bridge
Bootstrap
Capacitors
2-Channel
H-Bridge
BTL
Mode
System
Microcontroller
OUT_A
OUT_B
OUT_C
OUT_D
BST_A
BST_B
BST_C
BST_D
RESET_AB
RESET_CD
System
Power
Supply
Hardwire
Mode
Control
PVDD
GVDD (12 V)/VDD (12 V)
GND
Hardwire
OC
Limit
M1
M3
PVDD
Power
Supply
Decoupling
35.5 V
12 V
GND
VAC
PWM_A
PWM_C
PWM_D
PWM_B
V
ALID
M2
Left-
Channel
Output
Right-
Channel
Output
Input
H-Bridge
1
Input
H-Bridge
2
GVDD
VDD
VREG
Power Supply
Decoupling
4 44
Bootstrap
Capacitors
2nd-Order L-C
Output Filter
for Each
Half-Bridge
Output
H-Bridge
2
Output
H-Bridge 1
OTW
OTW
SD
SD
TAS5518
PVDD_A,
B, C, D
GND_A,
B, C, D
GVDD_A,
B, C, D
GND
VDD VREG
AGND
OC_ADJ
• TAS5342
1) TYPICAL SYSTEM BLOCK DIAGRAM