Marantz SR7500/A1B - Page 60

80
Pin
Port
mode = 7
I/O Use STBY Name
Port Setting
Note
Act. init
IC36 (DSP PCB): H8S/2505(HD64F2505)
120 P36/RxD4 I/O,I SI I USB_CSDAI Serial Data OUT from USB Module (USB
CSDAO) This is not used.
121 P35/SCK1/
SCK4/SCL0/
~IRQ5
I/O,I/O,I/
O,I/O,I
SC I USB_CSCL Serial Clock from USB Module. This is not used.
122 P34/RxD1/SDA0 I/O,I,I/O O I NC open
123 P33/TxD1/SCL1 I/O,O,I/O O I NC open
124 P32/SCK0/SDA1/
~IRQ4
I/O,I/O,I/
O,I
INT I REQ2 L - DSP FINTR EQ
125 P31/RxD0 I/O,I SI I RXD UART for RS232C, Flash WRNeed Pull
UPRESET=H
126 P30/TxD0 I/O,O SC I TXD UART for RS232C, Flash WRNeed Pull UP
127 P77/TxD3 I/O,O SO O OSDDATA - - FrontFL,Video(OSD),Y/C&Sepa,4094,SAA,AK
128 P76/RxD3 I/O,I I I - - PULL DOWN
129 P75/TMO3/SCK3 I/O,I/
O,I/O
SC I OSDCLK - - FrontFL,Video(OSD),Y/C&Sepa,4094,SAA,AK
130 P74/TMO2/
~MRES
I/O,O O I _RSTFL L L Reset FL Driver
131 P73/TMO1 I/O,O O I _CEFL L L FL Driver Chip Select
132 P72/TMO0 I/O,O I I USB_MUTE for Audio Mute Control. This is not used.
133 P71/TMRI23/
TMCI23
I/O,O,O I I USB_PLL_
UNLOCK
for Clock Control. This is not used.
134 P70/TMRI01/
TMCI01
I/O,O,O O I CLK_SW TC74VHC157 SEL
135 PG4 I/O O I _SCS L H DSP CHIP ENABLE
136 PG3 I/O O I _RSTDSP L L DSP
137 PG2 I/O O I _FCS L H DSP CHIP ENABLE
138 PG1/~IRQ7 I/O,I INT I IRQ7 - - RDS Clock
139 PG0/~IRQ6 I/O,I INT I USB_CCE L - Chip Enable for SPI. This is not used.
140 PE0 I/O O I NC - - open
141 PE1 I/O O I _CEEX L H P-Exp(Video)Sel A
142 PE2 I/O O I Y_OSD H L Y/C_OSD_IC_BYPASS
143 PE3 I/O O I CVBS_OSD H L CVBS_OSD_IC_BYPASS
144 PE4 I/O O I _CEOSD L H Video Circuit