Maxim Integrated
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Evaluates: MAX86140 and MAX86141
MAX86140/MAX86141
Evaluation System
MAX86140/MAX86141 EV Kit Schematics (continued)
MAXSensorBLE
D3/E1/E2 ARE NOT USED IN ORDER TO KEEP GND INTACT NEAR THE BLE ANTENNA (NRF5_UART AND RESET ARE NOT CONNECTED)
UART/HANDSHAKE TO NIMITZ
SPI SLAVE TO NIMITZ
I2C MASTER, OR SLAVE TO NIMITZ, OR TRI-STATE
SPI MASTER TO SENSORS OR TRI-STATE
(IF >5MM)
(COMPONENTS SOLDER DIRECTLY TO TRACE)
NO STUBS ON PI FILTER
50OHM TL
MAX14698 HAS INTEGRATED ESD PROTECTION
HANDSHAKE TO NIMITZ
33
DNI
0
DNI DNI
1.8PF1PF
NRF52832-CIAA
12PF
12PF
33
100PF
0.1UF
MAX14689EWL+
0.1UF
0.1UF
12PF
0.1UF
MAX14689EWL+
MAX14689EWL+
0.1UF
33
33
1UF
32MHZ
0.1UF
100PF
4.7UF
0
MAX14689EWL+
12PF
32.768KHZ
1PF
3.3NH
12PF
2450AT18A100
DNI
0
0
0
0
0
0
0
DNI
DNI
R15
R34
R33
Z17 Z18 C19
U2
X2
U3
U4
U5
U6
C27
C22
C26
C30
C31
C32
C33
C25
C23
C24
C21
C28
A1
Y1
RA4
RA3
C20
RA2
RA1
C29
L4
Z44
R31
R32
R4
R3
R2
R1
PMIC_INT_N
ACC_INT_N
OPT_INT_N
A_SPI0_CSACC_N
A_SP0_SCK
A_SPI0_MOSI SPI0_MOSI
SPI0_SCK
SPI0_CSACC_N
SPI2_SCK
SPI2_CSBLE_N
SPI0_MISO
A_SPI0_CSOPT_N SPI0_CSOPT_N
SPI2_MISO
SPI2_MOSI
NRF5_P0_04
DBG_LED0
SPI1_CSF_N
NRF5_SWDCLK
RX1-
3V3
NRF5_SWDIO
DBG_EN
NIM_UART_RX
TX1-
3V3
3V3
TX1+
3V3
NIM_SWDIO
NIM_UART_TX
DBG_EN
RX2-
RX2+
TX2-
TX2+
NRF5_UART_TX
NIM_SWDCLK
DBG_EN
NRF5_UART_RX
RX1+
DBG_EN
1V8_B
J3.18
SHDNL_N
NRF5_SWDIO
NRF5_SWDCLK
PMIC_MON
J3.17
SCL
NRF5_P0_03
SDA
PMIC_MPC
PMIC_PFN2
DBG_LED1
SPI1_WP/IO2
NRF5_UART_RX
NRF5_UART_TX
SPI1_FRST/IO3
NRF5_P0_31
PMIC_ALRT_N
D3
F7
F6
2
2 1D
D2
H1
B2
A2
B6
A1
G7
D6
F5
E3
C4
C5
H7
B5
A5
A4
A3
B4
B3
E1
F2
G2
F3
H2
G3
H3
H5
G4
H6
F4
G6
E7
E6
C6
D7
G5
C3
A6
C2
B7
A2
B1
B3
B2
A1
A3
C1
C3
C2
A2
B1
B3
B2
A1
A3
C1
C3
C2
A2
B1
B3
B2
A1
A3
C1
C3
C2
A2
B1
B3
B2
A1
A3
C1
C3
C2
1 2
4
31
2
A7
G1
F1
1
1
C7
H4
E2
VSS
VDD
P0.12
P0.14/TRACEDATA3
P0.15/TRACEDATA2
P0.16/TRACEDATA1
P0.18/TRACEDATA0
P0.21/NRESET
P0.08
P0.09
NFC2/P0.10
P0.13
P0.17
P0.20/TRACECLK
SWDIO
P0.06
P0.07
VSS
P0.11
P0.19
P0.22
SWDCLK
P0.05/AIN3
P0.04/AIN2
VSS
P0.23
P0.24
P0.00/XL1
P0.03/AIN1
P0.26
VSS_PA
ANT
P0.01/XL2
P0.02/AIN0
VSS
NC
DEC3
DEC1
DCC
P0.31/AIN7
P0.27
P0.25
XC1
VDD
DEC4
P0.30/AIN6
P0.29/AIN5
P0.28/AIN4
DEC2
XC2
GND
VCC
CB
NC1
NO2
COM2
NO1
COM1
NC2
GND
VCC
CB
NC1
NO2
COM2
NO1
COM1
NC2
GND
VCC
CB
NC1
NO2
COM2
NO1
COM1
NC2
GND
VCC
CB
NC1
NO2
COM2
NO1
COM1
NC2
NC
INPUT
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