Microchip Technology dsPIC30F - Decoder Operation: x2 vs x4 Modes

dsPIC30F Quadrature Encoder Interface Module
© 2005 Microchip Technology Inc.
Page 10
© 2005 Microchip Technology Incorporated. All Rights Reserved. dsPIC30F Quadrature Encoder Interface Module 10
Timing Diagram
+1
+1+1
+1
+1
+1 +1 +1
+1
+1
+1
+1 +1
+1
+1
+1
-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
-1 -1
COUNT
PHASE A
PHASE B
UPDN
This is an example of how the decoder works. We are using the x4 mode,
where the clock pulse is at each edge of both phases. In the first part of the
timing diagram Phase A leads Phase B, so that the counter is counting up.
Then, in the second half, the rotation of the rotor is reversed, Phase B now
leads Phase A and the counter is counting down. This is why an up/down
counter is required in this application.
The count direction can be determined by reading the UPDN bit in the QEI
control register, but the UPDN pin can also be used to indicate the count
direction status.
With the x4 mode we can get a very high angular resolution, but we also get a
relatively high output clock frequency. With the x2 mode, the resolution is twice
as fine, but the frequncy is lower.
The maximum allowed quadrature frequency is one-third of the instruction cycle
frequency Fcy.