Mitsubishi Electric MELSEC-Q QD75M - Page 495

10 - 18
MELSEC-Q
10 HIGH-LEVEL POSITIONING CONTROL
REMARK
The "PLC CPU memo area" can be designated as the buffer memory address to be
designated in
Da.17
. (Refer to Section 7.1.1 "Configuration and roles of QD75
memory".)
Address 30000
30001
30099
QD75 buffer memory