3.
SPECIFICATIONS
MELSEC-A
3.5.3
OClDC3
transmistion
control
This section describes DCl/DC3 transmission control.
(1) What is DCl/DC3 transmission control?
When data communications
is
executed
in
the no-protocol mode, this
notifies the external devices whether the AJ71C24 can or cannot
receive data using the DC1 /DC3 code.
(2) Received data flow and control operations
(a) Received data flows
in
the same way shown in Section 3.5.2(2).
Data transmission is controlled
in
the same way as the DTR control
shown
in
Section 3.5.2(3).
The AJ71C24 sends DCl or DC3 to the external device without
turning the DTR signal
ON/OFF.
Section 3.5.2 gives details about DCl/DC3 transmission timing.
DTR signal state corresponds to the data transmission as shown
below:
(DTR control) (DCl/DC3 transmission control)
DTR signal is
OFF
:
DC3 transmission
DTR signal is
ON
:
DC1 transmission
\
€
orb
10
bytes
(After
reading from
the
sequence
program)
(b) Clear the received data as shown in Section 9.5. This operation is
not only executed
in
the no-protocol receive buffer, but
in
the
OS
area as well.
(c) When the above-mentioned
OS
area has no vacant area, receiving
data causes an error, and the data is ignored until
the
OS
area has
enough vacant area.
When this happens, the 2410 and 4-SI0 LEDs
go
ON
(see Section
4.2.2).
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